Patches contributed by Eötvös Lorand University
commit e2780a68f889c9d7ec8e78d58a3a2be8cfebf202
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Feb 17 13:52:29 2009 +0100
x86, apic: merge genapic.h into apic.h
Impact: cleanup
Reduce the number of include files to worry about.
Also, most of the users of APIC facilities had to
include genapic.h already, which embedded apic.h,
so the distinction was meaningless.
[ include apic.h from genapic.h for compatibility. ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 4f56e053d347..c07f5fbf43c8 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -1,15 +1,18 @@
#ifndef _ASM_X86_APIC_H
#define _ASM_X86_APIC_H
-#include <linux/pm.h>
+#include <linux/cpumask.h>
#include <linux/delay.h>
+#include <linux/pm.h>
#include <asm/alternative.h>
-#include <asm/fixmap.h>
-#include <asm/apicdef.h>
+#include <asm/cpufeature.h>
#include <asm/processor.h>
+#include <asm/apicdef.h>
+#include <asm/atomic.h>
+#include <asm/fixmap.h>
+#include <asm/mpspec.h>
#include <asm/system.h>
-#include <asm/cpufeature.h>
#include <asm/msr.h>
#define ARCH_APICTIMER_STOPS_ON_C3 1
@@ -235,4 +238,307 @@ static inline void disable_local_APIC(void) { }
#endif
+/*
+ * Copyright 2004 James Cleverdon, IBM.
+ * Subject to the GNU Public License, v.2
+ *
+ * Generic APIC sub-arch data struct.
+ *
+ * Hacked for x86-64 by James Cleverdon from i386 architecture code by
+ * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
+ * James Cleverdon.
+ */
+struct genapic {
+ char *name;
+
+ int (*probe)(void);
+ int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
+ int (*apic_id_registered)(void);
+
+ u32 irq_delivery_mode;
+ u32 irq_dest_mode;
+
+ const struct cpumask *(*target_cpus)(void);
+
+ int disable_esr;
+
+ int dest_logical;
+ unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
+ unsigned long (*check_apicid_present)(int apicid);
+
+ void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
+ void (*init_apic_ldr)(void);
+
+ physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
+
+ void (*setup_apic_routing)(void);
+ int (*multi_timer_check)(int apic, int irq);
+ int (*apicid_to_node)(int logical_apicid);
+ int (*cpu_to_logical_apicid)(int cpu);
+ int (*cpu_present_to_apicid)(int mps_cpu);
+ physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
+ void (*setup_portio_remap)(void);
+ int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
+ void (*enable_apic_mode)(void);
+ int (*phys_pkg_id)(int cpuid_apic, int index_msb);
+
+ /*
+ * When one of the next two hooks returns 1 the genapic
+ * is switched to this. Essentially they are additional
+ * probe functions:
+ */
+ int (*mps_oem_check)(struct mpc_table *mpc, char *oem, char *productid);
+
+ unsigned int (*get_apic_id)(unsigned long x);
+ unsigned long (*set_apic_id)(unsigned int id);
+ unsigned long apic_id_mask;
+
+ unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
+ unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
+ const struct cpumask *andmask);
+
+ /* ipi */
+ void (*send_IPI_mask)(const struct cpumask *mask, int vector);
+ void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
+ int vector);
+ void (*send_IPI_allbutself)(int vector);
+ void (*send_IPI_all)(int vector);
+ void (*send_IPI_self)(int vector);
+
+ /* wakeup_secondary_cpu */
+ int (*wakeup_cpu)(int apicid, unsigned long start_eip);
+
+ int trampoline_phys_low;
+ int trampoline_phys_high;
+
+ void (*wait_for_init_deassert)(atomic_t *deassert);
+ void (*smp_callin_clear_local_apic)(void);
+ void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
+ void (*inquire_remote_apic)(int apicid);
+
+ /* apic ops */
+ u32 (*read)(u32 reg);
+ void (*write)(u32 reg, u32 v);
+ u64 (*icr_read)(void);
+ void (*icr_write)(u32 low, u32 high);
+ void (*wait_icr_idle)(void);
+ u32 (*safe_wait_icr_idle)(void);
+};
+
+extern struct genapic *apic;
+
+static inline u32 apic_read(u32 reg)
+{
+ return apic->read(reg);
+}
+
+static inline void apic_write(u32 reg, u32 val)
+{
+ apic->write(reg, val);
+}
+
+static inline u64 apic_icr_read(void)
+{
+ return apic->icr_read();
+}
+
+static inline void apic_icr_write(u32 low, u32 high)
+{
+ apic->icr_write(low, high);
+}
+
+static inline void apic_wait_icr_idle(void)
+{
+ apic->wait_icr_idle();
+}
+
+static inline u32 safe_apic_wait_icr_idle(void)
+{
+ return apic->safe_wait_icr_idle();
+}
+
+
+static inline void ack_APIC_irq(void)
+{
+ /*
+ * ack_APIC_irq() actually gets compiled as a single instruction
+ * ... yummie.
+ */
+
+ /* Docs say use 0 for future compatibility */
+ apic_write(APIC_EOI, 0);
+}
+
+static inline unsigned default_get_apic_id(unsigned long x)
+{
+ unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
+
+ if (APIC_XAPIC(ver))
+ return (x >> 24) & 0xFF;
+ else
+ return (x >> 24) & 0x0F;
+}
+
+/*
+ * Warm reset vector default position:
+ */
+#define DEFAULT_TRAMPOLINE_PHYS_LOW 0x467
+#define DEFAULT_TRAMPOLINE_PHYS_HIGH 0x469
+
+#ifdef CONFIG_X86_32
+extern void es7000_update_genapic_to_cluster(void);
+#else
+extern struct genapic apic_flat;
+extern struct genapic apic_physflat;
+extern struct genapic apic_x2apic_cluster;
+extern struct genapic apic_x2apic_phys;
+extern int default_acpi_madt_oem_check(char *, char *);
+
+extern void apic_send_IPI_self(int vector);
+
+extern struct genapic apic_x2apic_uv_x;
+DECLARE_PER_CPU(int, x2apic_extra_bits);
+
+extern int default_cpu_present_to_apicid(int mps_cpu);
+extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
+#endif
+
+static inline void default_wait_for_init_deassert(atomic_t *deassert)
+{
+ while (!atomic_read(deassert))
+ cpu_relax();
+ return;
+}
+
+extern void generic_bigsmp_probe(void);
+
+
+#ifdef CONFIG_X86_LOCAL_APIC
+
+#include <asm/smp.h>
+
+#define APIC_DFR_VALUE (APIC_DFR_FLAT)
+
+static inline const struct cpumask *default_target_cpus(void)
+{
+#ifdef CONFIG_SMP
+ return cpu_online_mask;
+#else
+ return cpumask_of(0);
+#endif
+}
+
+DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
+
+
+static inline unsigned int read_apic_id(void)
+{
+ unsigned int reg;
+
+ reg = apic_read(APIC_ID);
+
+ return apic->get_apic_id(reg);
+}
+
+extern void default_setup_apic_routing(void);
+
+#ifdef CONFIG_X86_32
+/*
+ * Set up the logical destination ID.
+ *
+ * Intel recommends to set DFR, LDR and TPR before enabling
+ * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
+ * document number 292116). So here it goes...
+ */
+extern void default_init_apic_ldr(void);
+
+static inline int default_apic_id_registered(void)
+{
+ return physid_isset(read_apic_id(), phys_cpu_present_map);
+}
+
+static inline unsigned int
+default_cpu_mask_to_apicid(const struct cpumask *cpumask)
+{
+ return cpumask_bits(cpumask)[0];
+}
+
+static inline unsigned int
+default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
+ const struct cpumask *andmask)
+{
+ unsigned long mask1 = cpumask_bits(cpumask)[0];
+ unsigned long mask2 = cpumask_bits(andmask)[0];
+ unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
+
+ return (unsigned int)(mask1 & mask2 & mask3);
+}
+
+static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
+{
+ return cpuid_apic >> index_msb;
+}
+
+extern int default_apicid_to_node(int logical_apicid);
+
+#endif
+
+static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
+{
+ return physid_isset(apicid, bitmap);
+}
+
+static inline unsigned long default_check_apicid_present(int bit)
+{
+ return physid_isset(bit, phys_cpu_present_map);
+}
+
+static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map)
+{
+ return phys_map;
+}
+
+/* Mapping from cpu number to logical apicid */
+static inline int default_cpu_to_logical_apicid(int cpu)
+{
+ return 1 << cpu;
+}
+
+static inline int __default_cpu_present_to_apicid(int mps_cpu)
+{
+ if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
+ return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
+ else
+ return BAD_APICID;
+}
+
+static inline int
+__default_check_phys_apicid_present(int boot_cpu_physical_apicid)
+{
+ return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
+}
+
+#ifdef CONFIG_X86_32
+static inline int default_cpu_present_to_apicid(int mps_cpu)
+{
+ return __default_cpu_present_to_apicid(mps_cpu);
+}
+
+static inline int
+default_check_phys_apicid_present(int boot_cpu_physical_apicid)
+{
+ return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
+}
+#else
+extern int default_cpu_present_to_apicid(int mps_cpu);
+extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
+#endif
+
+static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
+{
+ return physid_mask_of_physid(phys_apicid);
+}
+
+#endif /* CONFIG_X86_LOCAL_APIC */
+
#endif /* _ASM_X86_APIC_H */
diff --git a/arch/x86/include/asm/genapic.h b/arch/x86/include/asm/genapic.h
index 9b874a386837..4b8b98fa7f25 100644
--- a/arch/x86/include/asm/genapic.h
+++ b/arch/x86/include/asm/genapic.h
@@ -1,313 +1 @@
-#ifndef _ASM_X86_GENAPIC_H
-#define _ASM_X86_GENAPIC_H
-
-#include <linux/cpumask.h>
-
-#include <asm/mpspec.h>
-#include <asm/atomic.h>
#include <asm/apic.h>
-
-/*
- * Copyright 2004 James Cleverdon, IBM.
- * Subject to the GNU Public License, v.2
- *
- * Generic APIC sub-arch data struct.
- *
- * Hacked for x86-64 by James Cleverdon from i386 architecture code by
- * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
- * James Cleverdon.
- */
-struct genapic {
- char *name;
-
- int (*probe)(void);
- int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
- int (*apic_id_registered)(void);
-
- u32 irq_delivery_mode;
- u32 irq_dest_mode;
-
- const struct cpumask *(*target_cpus)(void);
-
- int disable_esr;
-
- int dest_logical;
- unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
- unsigned long (*check_apicid_present)(int apicid);
-
- void (*vector_allocation_domain)(int cpu, struct cpumask *retmask);
- void (*init_apic_ldr)(void);
-
- physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
-
- void (*setup_apic_routing)(void);
- int (*multi_timer_check)(int apic, int irq);
- int (*apicid_to_node)(int logical_apicid);
- int (*cpu_to_logical_apicid)(int cpu);
- int (*cpu_present_to_apicid)(int mps_cpu);
- physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
- void (*setup_portio_remap)(void);
- int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
- void (*enable_apic_mode)(void);
- int (*phys_pkg_id)(int cpuid_apic, int index_msb);
-
- /*
- * When one of the next two hooks returns 1 the genapic
- * is switched to this. Essentially they are additional
- * probe functions:
- */
- int (*mps_oem_check)(struct mpc_table *mpc, char *oem, char *productid);
-
- unsigned int (*get_apic_id)(unsigned long x);
- unsigned long (*set_apic_id)(unsigned int id);
- unsigned long apic_id_mask;
-
- unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask);
- unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask,
- const struct cpumask *andmask);
-
- /* ipi */
- void (*send_IPI_mask)(const struct cpumask *mask, int vector);
- void (*send_IPI_mask_allbutself)(const struct cpumask *mask,
- int vector);
- void (*send_IPI_allbutself)(int vector);
- void (*send_IPI_all)(int vector);
- void (*send_IPI_self)(int vector);
-
- /* wakeup_secondary_cpu */
- int (*wakeup_cpu)(int apicid, unsigned long start_eip);
-
- int trampoline_phys_low;
- int trampoline_phys_high;
-
- void (*wait_for_init_deassert)(atomic_t *deassert);
- void (*smp_callin_clear_local_apic)(void);
- void (*store_NMI_vector)(unsigned short *high, unsigned short *low);
- void (*inquire_remote_apic)(int apicid);
-
- /* apic ops */
- u32 (*read)(u32 reg);
- void (*write)(u32 reg, u32 v);
- u64 (*icr_read)(void);
- void (*icr_write)(u32 low, u32 high);
- void (*wait_icr_idle)(void);
- u32 (*safe_wait_icr_idle)(void);
-};
-
-extern struct genapic *apic;
-
-static inline u32 apic_read(u32 reg)
-{
- return apic->read(reg);
-}
-
-static inline void apic_write(u32 reg, u32 val)
-{
- apic->write(reg, val);
-}
-
-static inline u64 apic_icr_read(void)
-{
- return apic->icr_read();
-}
-
-static inline void apic_icr_write(u32 low, u32 high)
-{
- apic->icr_write(low, high);
-}
-
-static inline void apic_wait_icr_idle(void)
-{
- apic->wait_icr_idle();
-}
-
-static inline u32 safe_apic_wait_icr_idle(void)
-{
- return apic->safe_wait_icr_idle();
-}
-
-
-static inline void ack_APIC_irq(void)
-{
- /*
- * ack_APIC_irq() actually gets compiled as a single instruction
- * ... yummie.
- */
-
- /* Docs say use 0 for future compatibility */
- apic_write(APIC_EOI, 0);
-}
-
-static inline unsigned default_get_apic_id(unsigned long x)
-{
- unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
-
- if (APIC_XAPIC(ver))
- return (x >> 24) & 0xFF;
- else
- return (x >> 24) & 0x0F;
-}
-
-/*
- * Warm reset vector default position:
- */
-#define DEFAULT_TRAMPOLINE_PHYS_LOW 0x467
-#define DEFAULT_TRAMPOLINE_PHYS_HIGH 0x469
-
-#ifdef CONFIG_X86_32
-extern void es7000_update_genapic_to_cluster(void);
-#else
-extern struct genapic apic_flat;
-extern struct genapic apic_physflat;
-extern struct genapic apic_x2apic_cluster;
-extern struct genapic apic_x2apic_phys;
-extern int default_acpi_madt_oem_check(char *, char *);
-
-extern void apic_send_IPI_self(int vector);
-
-extern struct genapic apic_x2apic_uv_x;
-DECLARE_PER_CPU(int, x2apic_extra_bits);
-
-extern int default_cpu_present_to_apicid(int mps_cpu);
-extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
-#endif
-
-static inline void default_wait_for_init_deassert(atomic_t *deassert)
-{
- while (!atomic_read(deassert))
- cpu_relax();
- return;
-}
-
-extern void generic_bigsmp_probe(void);
-
-
-#ifdef CONFIG_X86_LOCAL_APIC
-
-#include <asm/smp.h>
-
-#define APIC_DFR_VALUE (APIC_DFR_FLAT)
-
-static inline const struct cpumask *default_target_cpus(void)
-{
-#ifdef CONFIG_SMP
- return cpu_online_mask;
-#else
- return cpumask_of(0);
-#endif
-}
-
-DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid);
-
-
-static inline unsigned int read_apic_id(void)
-{
- unsigned int reg;
-
- reg = apic_read(APIC_ID);
-
- return apic->get_apic_id(reg);
-}
-
-extern void default_setup_apic_routing(void);
-
-#ifdef CONFIG_X86_32
-/*
- * Set up the logical destination ID.
- *
- * Intel recommends to set DFR, LDR and TPR before enabling
- * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
- * document number 292116). So here it goes...
- */
-extern void default_init_apic_ldr(void);
-
-static inline int default_apic_id_registered(void)
-{
- return physid_isset(read_apic_id(), phys_cpu_present_map);
-}
-
-static inline unsigned int
-default_cpu_mask_to_apicid(const struct cpumask *cpumask)
-{
- return cpumask_bits(cpumask)[0];
-}
-
-static inline unsigned int
-default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
- const struct cpumask *andmask)
-{
- unsigned long mask1 = cpumask_bits(cpumask)[0];
- unsigned long mask2 = cpumask_bits(andmask)[0];
- unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
-
- return (unsigned int)(mask1 & mask2 & mask3);
-}
-
-static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
-{
- return cpuid_apic >> index_msb;
-}
-
-extern int default_apicid_to_node(int logical_apicid);
-
-#endif
-
-static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
-{
- return physid_isset(apicid, bitmap);
-}
-
-static inline unsigned long default_check_apicid_present(int bit)
-{
- return physid_isset(bit, phys_cpu_present_map);
-}
-
-static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map)
-{
- return phys_map;
-}
-
-/* Mapping from cpu number to logical apicid */
-static inline int default_cpu_to_logical_apicid(int cpu)
-{
- return 1 << cpu;
-}
-
-static inline int __default_cpu_present_to_apicid(int mps_cpu)
-{
- if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
- return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
- else
- return BAD_APICID;
-}
-
-static inline int
-__default_check_phys_apicid_present(int boot_cpu_physical_apicid)
-{
- return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
-}
-
-#ifdef CONFIG_X86_32
-static inline int default_cpu_present_to_apicid(int mps_cpu)
-{
- return __default_cpu_present_to_apicid(mps_cpu);
-}
-
-static inline int
-default_check_phys_apicid_present(int boot_cpu_physical_apicid)
-{
- return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
-}
-#else
-extern int default_cpu_present_to_apicid(int mps_cpu);
-extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
-#endif
-
-static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
-{
- return physid_mask_of_physid(phys_apicid);
-}
-
-#endif /* CONFIG_X86_LOCAL_APIC */
-
-#endif /* _ASM_X86_GENAPIC_64_H */
commit 28aa29eeb3918f820b914679cfc4404972f2df32
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Feb 17 14:36:42 2009 +0100
remove: genapic prepare
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/include/asm/genapic.h b/arch/x86/include/asm/genapic.h
index a6d0b00a544c..9b874a386837 100644
--- a/arch/x86/include/asm/genapic.h
+++ b/arch/x86/include/asm/genapic.h
@@ -168,8 +168,6 @@ extern void apic_send_IPI_self(int vector);
extern struct genapic apic_x2apic_uv_x;
DECLARE_PER_CPU(int, x2apic_extra_bits);
-extern void default_setup_apic_routing(void);
-
extern int default_cpu_present_to_apicid(int mps_cpu);
extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
#endif
@@ -211,10 +209,9 @@ static inline unsigned int read_apic_id(void)
return apic->get_apic_id(reg);
}
-#ifdef CONFIG_X86_64
extern void default_setup_apic_routing(void);
-#else
+#ifdef CONFIG_X86_32
/*
* Set up the logical destination ID.
*
@@ -251,14 +248,6 @@ static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
return cpuid_apic >> index_msb;
}
-static inline void default_setup_apic_routing(void)
-{
-#ifdef CONFIG_X86_IO_APIC
- printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
- "Flat", nr_ioapics);
-#endif
-}
-
extern int default_apicid_to_node(int logical_apicid);
#endif
diff --git a/arch/x86/kernel/probe_32.c b/arch/x86/kernel/probe_32.c
index 6e31b17d546d..b3d5d74e5229 100644
--- a/arch/x86/kernel/probe_32.c
+++ b/arch/x86/kernel/probe_32.c
@@ -53,6 +53,15 @@ int no_broadcast = DEFAULT_SEND_IPI;
#ifdef CONFIG_X86_LOCAL_APIC
+void default_setup_apic_routing(void)
+{
+#ifdef CONFIG_X86_IO_APIC
+ printk(KERN_INFO
+ "Enabling APIC mode: Flat. Using %d I/O APICs\n",
+ nr_ioapics);
+#endif
+}
+
static void default_vector_allocation_domain(int cpu, struct cpumask *retmask)
{
/*
commit 0b6de0092244c98b5ba1abda34c92470a20e0d0c
Merge: 37a25424252b f62bae5009c1
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Feb 17 17:20:11 2009 +0100
Merge branch 'x86/apic' into perfcounters/core
Conflicts:
arch/x86/kernel/cpu/perfctr-watchdog.c
diff --cc arch/x86/kernel/apic/apic.c
index c9aed4510585,c12823eb55b5..d1bf032ba26f
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@@ -34,10 -34,8 +34,9 @@@
#include <linux/smp.h>
#include <linux/mm.h>
+#include <asm/perf_counter.h>
#include <asm/arch_hooks.h>
#include <asm/pgalloc.h>
- #include <asm/genapic.h>
#include <asm/atomic.h>
#include <asm/mpspec.h>
#include <asm/i8253.h>
commit 7d01d32d3b9becd6deba318b718db3d9fc181d23
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Feb 17 12:33:20 2009 +0100
x86, apic: fix build fallout of genapic changes
- make oprofile build
- select X86_X2APIC from X86_UV - it relies on it
- export genapic for oprofile modular build
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index bce241fe1d2d..8955262caa34 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -316,6 +316,7 @@ config X86_UV
bool "SGI Ultraviolet"
depends on X86_64
depends on X86_EXTENDED_PLATFORM
+ select X86_X2APIC
---help---
This option is needed in order to support SGI Ultraviolet systems.
If you don't have one of these, you should say N here.
diff --git a/arch/x86/kernel/cpu/mcheck/p4.c b/arch/x86/kernel/cpu/mcheck/p4.c
index 9b60fce09f75..f9c92b66dfbe 100644
--- a/arch/x86/kernel/cpu/mcheck/p4.c
+++ b/arch/x86/kernel/cpu/mcheck/p4.c
@@ -11,7 +11,7 @@
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/msr.h>
-#include <asm/apic.h>
+#include <asm/genapic.h>
#include <asm/therm_throt.h>
diff --git a/arch/x86/kernel/genapic_64.c b/arch/x86/kernel/genapic_64.c
index 70b616b4c629..ef7886353240 100644
--- a/arch/x86/kernel/genapic_64.c
+++ b/arch/x86/kernel/genapic_64.c
@@ -30,6 +30,7 @@ extern struct genapic apic_x2apic_phys;
extern struct genapic apic_x2apic_cluster;
struct genapic __read_mostly *apic = &apic_flat;
+EXPORT_SYMBOL_GPL(apic);
static struct genapic *apic_probe[] __initdata = {
#ifdef CONFIG_X86_UV
diff --git a/arch/x86/kernel/probe_32.c b/arch/x86/kernel/probe_32.c
index 1f701caa95bc..6e31b17d546d 100644
--- a/arch/x86/kernel/probe_32.c
+++ b/arch/x86/kernel/probe_32.c
@@ -8,6 +8,7 @@
*/
#include <linux/threads.h>
#include <linux/cpumask.h>
+#include <linux/module.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/ctype.h>
@@ -143,6 +144,7 @@ extern struct genapic apic_es7000;
extern struct genapic apic_default;
struct genapic *apic = &apic_default;
+EXPORT_SYMBOL_GPL(apic);
static struct genapic *apic_probe[] __initdata = {
#ifdef CONFIG_X86_NUMAQ
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index 202864ad49a7..a32a5c7a8ef6 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -19,7 +19,7 @@
#include <linux/cpu.h>
#include <asm/nmi.h>
#include <asm/msr.h>
-#include <asm/apic.h>
+#include <asm/genapic.h>
#include "op_counter.h"
#include "op_x86_model.h"
diff --git a/arch/x86/oprofile/op_model_p4.c b/arch/x86/oprofile/op_model_p4.c
index 4c4a51c90bc2..09a237bc9ef6 100644
--- a/arch/x86/oprofile/op_model_p4.c
+++ b/arch/x86/oprofile/op_model_p4.c
@@ -14,7 +14,7 @@
#include <linux/nmi.h>
#include <asm/msr.h>
#include <asm/fixmap.h>
-#include <asm/apic.h>
+#include <asm/genapic.h>
#include "op_x86_model.h"
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index e9f80c744cf3..5ebd8f605d76 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -16,7 +16,7 @@
#include <linux/slab.h>
#include <asm/ptrace.h>
#include <asm/msr.h>
-#include <asm/apic.h>
+#include <asm/genapic.h>
#include <asm/nmi.h>
#include <asm/intel_arch_perfmon.h>
commit 9f361c221912b6ffa1f7836e0bbf843917f6fce7
Merge: 494df596f9c3 ee8b53c1cfe3
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Feb 17 12:21:12 2009 +0100
Merge branch 'x86/headers' into x86/core
commit ee8b53c1cfe33aecf0c77c0aa3ce437f0d84d831
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Feb 17 12:20:13 2009 +0100
x86: remove stale arch/x86/include/asm/page_64.h.rej file
Introduced by:
51c78eb: x86: create _types.h counterparts for page*.h
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/include/asm/page_64.h.rej b/arch/x86/include/asm/page_64.h.rej
deleted file mode 100644
index 9b1807f18596..000000000000
--- a/arch/x86/include/asm/page_64.h.rej
+++ /dev/null
@@ -1,114 +0,0 @@
-***************
-*** 1,105 ****
- #ifndef _ASM_X86_PAGE_64_H
- #define _ASM_X86_PAGE_64_H
-
-- #define PAGETABLE_LEVELS 4
--
-- #define THREAD_ORDER 1
-- #define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
-- #define CURRENT_MASK (~(THREAD_SIZE - 1))
--
-- #define EXCEPTION_STACK_ORDER 0
-- #define EXCEPTION_STKSZ (PAGE_SIZE << EXCEPTION_STACK_ORDER)
--
-- #define DEBUG_STACK_ORDER (EXCEPTION_STACK_ORDER + 1)
-- #define DEBUG_STKSZ (PAGE_SIZE << DEBUG_STACK_ORDER)
--
-- #define IRQSTACK_ORDER 2
-- #define IRQSTACKSIZE (PAGE_SIZE << IRQSTACK_ORDER)
--
-- #define STACKFAULT_STACK 1
-- #define DOUBLEFAULT_STACK 2
-- #define NMI_STACK 3
-- #define DEBUG_STACK 4
-- #define MCE_STACK 5
-- #define N_EXCEPTION_STACKS 5 /* hw limit: 7 */
--
-- #define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT)
-- #define PUD_PAGE_MASK (~(PUD_PAGE_SIZE-1))
--
-- /*
-- * Set __PAGE_OFFSET to the most negative possible address +
-- * PGDIR_SIZE*16 (pgd slot 272). The gap is to allow a space for a
-- * hypervisor to fit. Choosing 16 slots here is arbitrary, but it's
-- * what Xen requires.
-- */
-- #define __PAGE_OFFSET _AC(0xffff880000000000, UL)
--
-- #define __PHYSICAL_START CONFIG_PHYSICAL_START
-- #define __KERNEL_ALIGN 0x200000
--
-- /*
-- * Make sure kernel is aligned to 2MB address. Catching it at compile
-- * time is better. Change your config file and compile the kernel
-- * for a 2MB aligned address (CONFIG_PHYSICAL_START)
-- */
-- #if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0
-- #error "CONFIG_PHYSICAL_START must be a multiple of 2MB"
-- #endif
--
-- #define __START_KERNEL (__START_KERNEL_map + __PHYSICAL_START)
-- #define __START_KERNEL_map _AC(0xffffffff80000000, UL)
--
-- /* See Documentation/x86_64/mm.txt for a description of the memory map. */
-- #define __PHYSICAL_MASK_SHIFT 46
-- #define __VIRTUAL_MASK_SHIFT 48
--
-- /*
-- * Kernel image size is limited to 512 MB (see level2_kernel_pgt in
-- * arch/x86/kernel/head_64.S), and it is mapped here:
-- */
-- #define KERNEL_IMAGE_SIZE (512 * 1024 * 1024)
-- #define KERNEL_IMAGE_START _AC(0xffffffff80000000, UL)
--
-- #ifndef __ASSEMBLY__
-- void clear_page(void *page);
-- void copy_page(void *to, void *from);
--
-- /* duplicated to the one in bootmem.h */
-- extern unsigned long max_pfn;
-- extern unsigned long phys_base;
--
-- extern unsigned long __phys_addr(unsigned long);
-- #define __phys_reloc_hide(x) (x)
--
-- /*
-- * These are used to make use of C type-checking..
-- */
-- typedef unsigned long pteval_t;
-- typedef unsigned long pmdval_t;
-- typedef unsigned long pudval_t;
-- typedef unsigned long pgdval_t;
-- typedef unsigned long pgprotval_t;
--
-- typedef struct page *pgtable_t;
--
-- typedef struct { pteval_t pte; } pte_t;
--
-- #define vmemmap ((struct page *)VMEMMAP_START)
--
-- extern unsigned long init_memory_mapping(unsigned long start,
-- unsigned long end);
--
-- extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn);
-- extern void free_initmem(void);
--
-- extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
-- extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
--
-- #endif /* !__ASSEMBLY__ */
--
-- #ifdef CONFIG_FLATMEM
-- #define pfn_valid(pfn) ((pfn) < max_pfn)
-- #endif
--
-
- #endif /* _ASM_X86_PAGE_64_H */
---- 1,6 ----
- #ifndef _ASM_X86_PAGE_64_H
- #define _ASM_X86_PAGE_64_H
-
-+ #include <asm/page_64_types.h>
-
- #endif /* _ASM_X86_PAGE_64_H */
commit 494df596f9c315e20523894caa2a2938db3e5d8d
Merge: 970ec1a8213c 98c061b6cf2e f6db44df5bd3 22796b157254 694aa960608d be716615fe59 c99608637eac
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Feb 17 12:07:00 2009 +0100
Merge branches 'x86/acpi', 'x86/apic', 'x86/cpudetect', 'x86/headers', 'x86/paravirt', 'x86/urgent' and 'x86/xen'; commit 'v2.6.29-rc5' into x86/core
diff --cc Makefile
index 681c1d23b4d4,22d758495ad2,c06e250eca18,77a006dae2da,77a006dae2da,7715b2c14fb4,77a006dae2da..b280cfcf1efe
--- a/Makefile
+++ b/Makefile
@@@@@@@@ -1,7 -1,7 -1,7 -1,7 -1,7 -1,7 -1,7 +1,7 @@@@@@@@
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 29
- -- -EXTRAVERSION = -rc4
- EXTRAVERSION = -rc1
- EXTRAVERSION = -rc3
+ +++++EXTRAVERSION = -rc5
NAME = Erotic Pickled Herring
# *DOCUMENTATION*
diff --cc arch/x86/kernel/cpu/common.c
index 83492b1f93b1,cbcdb796d47f,32093d08d872,e8f4a386bd9d,e8f4a386bd9d,83492b1f93b1,e8f4a386bd9d..4db150ed446d
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@@@@@@@ -110,9 -121,9 -110,9 -122,10 -122,10 -110,9 -122,10 +122,10 @@@@@@@@ DEFINE_PER_CPU_PAGE_ALIGNED(struct gdt_
[GDT_ENTRY_APMBIOS_BASE+2] = { { { 0x0000ffff, 0x00409200 } } },
[GDT_ENTRY_ESPFIX_SS] = { { { 0x00000000, 0x00c09200 } } },
- - - [GDT_ENTRY_PERCPU] = { { { 0x00000000, 0x00000000 } } },
- - - } };
+ + + [GDT_ENTRY_PERCPU] = { { { 0x0000ffff, 0x00cf9200 } } },
+++ + GDT_STACK_CANARY_INIT
#endif
+ + + } };
EXPORT_PER_CPU_SYMBOL_GPL(gdt_page);
#ifdef CONFIG_X86_32
@@@@@@@@ -212,6 -223,49 -212,49 -225,49 -225,49 -212,6 -225,49 +225,49 @@@@@@@@ static inline void squash_the_stupid_se
}
#endif
+ + /*
+ + * Some CPU features depend on higher CPUID levels, which may not always
+ + * be available due to CPUID level capping or broken virtualization
+ + * software. Add those features to this table to auto-disable them.
+ + */
+ + struct cpuid_dependent_feature {
+ + u32 feature;
+ + u32 level;
+ + };
+ + static const struct cpuid_dependent_feature __cpuinitconst
+ + cpuid_dependent_features[] = {
+ + { X86_FEATURE_MWAIT, 0x00000005 },
+ + { X86_FEATURE_DCA, 0x00000009 },
+ + { X86_FEATURE_XSAVE, 0x0000000d },
+ + { 0, 0 }
+ + };
+ +
+ + static void __cpuinit filter_cpuid_features(struct cpuinfo_x86 *c, bool warn)
+ + {
+ + const struct cpuid_dependent_feature *df;
+ + for (df = cpuid_dependent_features; df->feature; df++) {
+ + /*
+ + * Note: cpuid_level is set to -1 if unavailable, but
+ + * extended_extended_level is set to 0 if unavailable
+ + * and the legitimate extended levels are all negative
+ + * when signed; hence the weird messing around with
+ + * signs here...
+ + */
+ + if (cpu_has(c, df->feature) &&
- -- - ((s32)df->feature < 0 ?
- -- - (u32)df->feature > (u32)c->extended_cpuid_level :
- -- - (s32)df->feature > (s32)c->cpuid_level)) {
++ ++++ ((s32)df->level < 0 ?
++ ++++ (u32)df->level > (u32)c->extended_cpuid_level :
++ ++++ (s32)df->level > (s32)c->cpuid_level)) {
+ + clear_cpu_cap(c, df->feature);
+ + if (warn)
+ + printk(KERN_WARNING
+ + "CPU: CPU feature %s disabled "
+ + "due to lack of CPUID level 0x%x\n",
+ + x86_cap_flags[df->feature],
+ + df->level);
+ + }
+ + }
- -- -}
++ ++++}
+ +
/*
* Naming convention should be: <Name> [(<Codename>)]
* This table only is used unless init_<vendor>() below doesn't set it;
@@@@@@@@ -242,9 -296,19 -285,9 -298,20 -298,20 -242,9 -298,20 +298,20 @@@@@@@@ static char __cpuinit *table_lookup_mod
__u32 cleared_cpu_caps[NCAPINTS] __cpuinitdata;
+ + + void load_percpu_segment(int cpu)
+ + + {
+ + + #ifdef CONFIG_X86_32
+ + + loadsegment(fs, __KERNEL_PERCPU);
+ + + #else
+ + + loadsegment(gs, 0);
+ + + wrmsrl(MSR_GS_BASE, (unsigned long)per_cpu(irq_stack_union.gs_base, cpu));
+ + + #endif
+++ + load_stack_canary_segment();
+ + + }
+ + +
/* Current gdt points %fs at the "master" per-cpu area: after this,
* it's on the real one. */
- - - void switch_to_new_gdt(void)
+ + + void switch_to_new_gdt(int cpu)
{
struct desc_ptr gdt_descr;
@@@@@@@@ -395,13 -455,8 -438,13 -458,8 -458,8 -395,13 -458,8 +458,8 @@@@@@@@ void __cpuinit detect_ht(struct cpuinfo
core_bits = get_count_order(c->x86_max_cores);
- - - #ifdef CONFIG_X86_64
- - - c->cpu_core_id = phys_pkg_id(index_msb) &
- ((1 << core_bits) - 1);
- #else
- c->cpu_core_id = phys_pkg_id(c->initial_apicid, index_msb) &
+ + + c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, index_msb) &
((1 << core_bits) - 1);
- - #else
- - c->cpu_core_id = phys_pkg_id(c->initial_apicid, index_msb) &
- - ((1 << core_bits) - 1);
- - - #endif
}
out:
@@@@@@@@ -877,54 -934,26 -922,54 -937,22 -937,22 -877,54 -937,22 +937,22 @@@@@@@@ static __init int setup_disablecpuid(ch
__setup("clearcpuid=", setup_disablecpuid);
#ifdef CONFIG_X86_64
- - - struct x8664_pda **_cpu_pda __read_mostly;
- - - EXPORT_SYMBOL(_cpu_pda);
- - -
struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
- - - static char boot_cpu_stack[IRQSTACKSIZE] __page_aligned_bss;
- -
- - void __cpuinit pda_init(int cpu)
- - {
- - struct x8664_pda *pda = cpu_pda(cpu);
+ + + DEFINE_PER_CPU_FIRST(union irq_stack_union,
+ + + irq_stack_union) __aligned(PAGE_SIZE);
- #ifdef CONFIG_SMP
- DEFINE_PER_CPU(char *, irq_stack_ptr); /* will be set during per cpu init */
- #else
+ + + DEFINE_PER_CPU(char *, irq_stack_ptr) =
- per_cpu_var(irq_stack_union.irq_stack) + IRQ_STACK_SIZE - 64;
- #endif
+++ + init_per_cpu_var(irq_stack_union.irq_stack) + IRQ_STACK_SIZE - 64;
- void __cpuinit pda_init(int cpu)
- {
- struct x8664_pda *pda = cpu_pda(cpu);
-
- - - /* Setup up data that may be needed in __get_free_pages early */
- - - loadsegment(fs, 0);
- - - loadsegment(gs, 0);
- - - /* Memory clobbers used to order PDA accessed */
- - - mb();
- - - wrmsrl(MSR_GS_BASE, pda);
- - - mb();
- - -
- - - pda->cpunumber = cpu;
- - - pda->irqcount = -1;
- - - pda->kernelstack = (unsigned long)stack_thread_info() -
- - - PDA_STACKOFFSET + THREAD_SIZE;
- - - pda->active_mm = &init_mm;
- - - pda->mmu_state = 0;
- - -
- - - if (cpu == 0) {
- - - /* others are initialized in smpboot.c */
- - - pda->pcurrent = &init_task;
- - - pda->irqstackptr = boot_cpu_stack;
- - - pda->irqstackptr += IRQSTACKSIZE - 64;
- - - } else {
- - - if (!pda->irqstackptr) {
- - - pda->irqstackptr = (char *)
- - - __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
- - - if (!pda->irqstackptr)
- - - panic("cannot allocate irqstack for cpu %d",
- - - cpu);
- - - pda->irqstackptr += IRQSTACKSIZE - 64;
- - - }
+ + + DEFINE_PER_CPU(unsigned long, kernel_stack) =
+ + + (unsigned long)&init_thread_union - KERNEL_STACK_OFFSET + THREAD_SIZE;
+ + + EXPORT_PER_CPU_SYMBOL(kernel_stack);
- - - if (pda->nodenumber == 0 && cpu_to_node(cpu) != NUMA_NO_NODE)
- - - pda->nodenumber = cpu_to_node(cpu);
- - - }
- - - }
+ + + DEFINE_PER_CPU(unsigned int, irq_count) = -1;
- - - static char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ +
- - - DEBUG_STKSZ] __page_aligned_bss;
+ + + static DEFINE_PER_CPU_PAGE_ALIGNED(char, exception_stacks
+ + + [(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ])
+ + + __aligned(PAGE_SIZE);
extern asmlinkage void ignore_sysret(void);
@@@@@@@@ -957,9 -986,9 -1002,9 -985,13 -985,13 -957,9 -985,13 +985,13 @@@@@@@@ unsigned long kernel_eflags
*/
DEFINE_PER_CPU(struct orig_ist, orig_ist);
--- - #else
+++ + #else /* x86_64 */
+ +
-- /* Make sure %fs is initialized properly in idle threads */
+++ + #ifdef CONFIG_CC_STACKPROTECTOR
+++ + DEFINE_PER_CPU(unsigned long, stack_canary);
+++ + #endif
++
- - /* Make sure %fs is initialized properly in idle threads */
+++ + /* Make sure %fs and %gs are initialized properly in idle threads */
struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs)
{
memset(regs, 0, sizeof(struct pt_regs));
diff --cc arch/x86/kernel/traps.c
index 98c2d055284b,0d032d2d8a18,98c2d055284b,bde57f0f1616,bde57f0f1616,a9e7548e1790,bde57f0f1616..acb8c0585ab9
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@@@@@@@ -906,16 -905,19 -906,16 -905,20 -905,20 -914,19 -905,20 +913,20 @@@@@@@@ void math_emulate(struct math_emu_info
}
#endif /* CONFIG_MATH_EMULATION */
- - dotraplinkage void __kprobes do_device_not_available(struct pt_regs regs)
+ + dotraplinkage void __kprobes
- - do_device_not_available(struct pt_regs *regs, long error)
+++ + do_device_not_available(struct pt_regs *regs, long error_code)
{
#ifdef CONFIG_X86_32
if (read_cr0() & X86_CR0_EM) {
+ + struct math_emu_info info = { };
+ +
- - conditional_sti(®s);
+ + conditional_sti(regs);
- - math_emulate(0);
+ +
- - info.regs = ®s;
+++ + info.regs = regs;
+ + math_emulate(&info);
} else {
math_state_restore(); /* interrupts still off */
- - conditional_sti(®s);
+ + conditional_sti(regs);
}
#else
math_state_restore();
commit 73d3fd96e77745742f3750b7b19ee42204adc210
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Feb 17 11:48:18 2009 +0100
ftrace: fix !CONFIG_DYNAMIC_FTRACE ftrace_swapper_pid definition
Impact: build fix
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
index 6533c1d20155..4e6c87ecf1bf 100644
--- a/kernel/trace/ftrace.c
+++ b/kernel/trace/ftrace.c
@@ -243,14 +243,16 @@ static void ftrace_update_pid_func(void)
mutex_unlock(&ftrace_lock);
}
+/* set when tracing only a pid */
+struct pid *ftrace_pid_trace;
+static struct pid * const ftrace_swapper_pid = &init_struct_pid;
+
#ifdef CONFIG_DYNAMIC_FTRACE
+
#ifndef CONFIG_FTRACE_MCOUNT_RECORD
# error Dynamic ftrace depends on MCOUNT_RECORD
#endif
-/* set when tracing only a pid */
-struct pid *ftrace_pid_trace;
-static struct pid * const ftrace_swapper_pid = &init_struct_pid;
static struct hlist_head ftrace_func_hash[FTRACE_FUNC_HASHSIZE] __read_mostly;
struct ftrace_func_hook {
commit 97d0bb8dcd8c2812e1927cdb51d7b1f9c98352b5
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Feb 17 11:47:39 2009 +0100
ftrace: fix !CONFIG_FTRACE [un_]register_ftrace_command() prototypes
Impact: build fix
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h
index b331e216d8a1..63281228ce3e 100644
--- a/include/linux/ftrace.h
+++ b/include/linux/ftrace.h
@@ -238,9 +238,11 @@ extern void ftrace_enable_daemon(void);
static inline void ftrace_release(void *start, unsigned long size) { }
static inline int register_ftrace_command(struct ftrace_func_command *cmd)
{
+ return -EINVAL;
}
static inline int unregister_ftrace_command(char *cmd_name)
{
+ return -EINVAL;
}
#endif /* CONFIG_DYNAMIC_FTRACE */
commit f492d3f8385a98f828e8220d14492337dc29e07b
Merge: c4e2b432d5b5 e110e3d1eaa0
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Feb 17 11:31:01 2009 +0100
Merge branch 'tip/tracing/ftrace' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-2.6-trace into tracing/ftrace