Patches contributed by Eötvös Lorand University
commit fe402e1f2b67a63f1e53ab2a316fc20f7ca4ec91
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Jan 28 04:32:51 2009 +0100
x86, apic: clean up / remove TARGET_CPUS
Impact: cleanup
use apic->target_cpus() directly instead of the TARGET_CPUS wrapper.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h
index 7e5c31a4f8da..53adda099c96 100644
--- a/arch/x86/include/asm/es7000/apic.h
+++ b/arch/x86/include/asm/es7000/apic.h
@@ -161,7 +161,7 @@ cpu_mask_to_apicid_cluster(const struct cpumask *cpumask)
return 0xFF;
/*
* The cpus in the mask must all be on the apic cluster. If are not
- * on the same apicid cluster return default value of TARGET_CPUS.
+ * on the same apicid cluster return default value of target_cpus():
*/
cpu = cpumask_first(cpumask);
apicid = cpu_to_logical_apicid(cpu);
@@ -194,7 +194,7 @@ static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
return cpu_to_logical_apicid(0);
/*
* The cpus in the mask must all be on the apic cluster. If are not
- * on the same apicid cluster return default value of TARGET_CPUS.
+ * on the same apicid cluster return default value of target_cpus():
*/
cpu = first_cpu(*cpumask);
apicid = cpu_to_logical_apicid(cpu);
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
index af1607ddd2a2..77a972475878 100644
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ b/arch/x86/include/asm/mach-default/mach_apic.h
@@ -22,7 +22,6 @@ static inline const struct cpumask *default_target_cpus(void)
#ifdef CONFIG_X86_64
#include <asm/genapic.h>
-#define TARGET_CPUS (apic->target_cpus())
#define init_apic_ldr (apic->init_apic_ldr)
#define cpu_mask_to_apicid (apic->cpu_mask_to_apicid)
#define cpu_mask_to_apicid_and (apic->cpu_mask_to_apicid_and)
@@ -33,7 +32,6 @@ static inline const struct cpumask *default_target_cpus(void)
#define wakeup_secondary_cpu (apic->wakeup_cpu)
extern void setup_apic_routing(void);
#else
-#define TARGET_CPUS (default_target_cpus())
#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
/*
* Set up the logical destination ID.
diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h
index 387a5d00c43d..da2d7780cb52 100644
--- a/arch/x86/include/asm/mach-generic/mach_apic.h
+++ b/arch/x86/include/asm/mach-generic/mach_apic.h
@@ -7,7 +7,6 @@
#define NO_BALANCE_IRQ (apic->no_balance_irq)
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL (apic->apic_destination_logical)
-#define TARGET_CPUS (apic->target_cpus())
#define init_apic_ldr (apic->init_apic_ldr)
#define ioapic_phys_id_map (apic->ioapic_phys_id_map)
#define setup_apic_routing (apic->setup_apic_routing)
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h
index 7c1f9151429c..cf5036f1ce6d 100644
--- a/arch/x86/include/asm/summit/apic.h
+++ b/arch/x86/include/asm/summit/apic.h
@@ -148,7 +148,7 @@ static inline unsigned int cpu_mask_to_apicid(const cpumask_t *cpumask)
return (int) 0xFF;
/*
* The cpus in the mask must all be on the apic cluster. If are not
- * on the same apicid cluster return default value of TARGET_CPUS.
+ * on the same apicid cluster return default value of target_cpus():
*/
cpu = first_cpu(*cpumask);
apicid = cpu_to_logical_apicid(cpu);
diff --git a/arch/x86/kernel/io_apic.c b/arch/x86/kernel/io_apic.c
index 301b6571d700..7503285e180d 100644
--- a/arch/x86/kernel/io_apic.c
+++ b/arch/x86/kernel/io_apic.c
@@ -1559,10 +1559,10 @@ static void setup_IO_APIC_irq(int apic_id, int pin, unsigned int irq, struct irq
cfg = desc->chip_data;
- if (assign_irq_vector(irq, cfg, TARGET_CPUS))
+ if (assign_irq_vector(irq, cfg, apic->target_cpus()))
return;
- dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);
+ dest = cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
apic_printk(APIC_VERBOSE,KERN_DEBUG
"IOAPIC[%d]: Set routing entry (%d-%d -> 0x%x -> "
@@ -1661,7 +1661,7 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin,
*/
entry.dest_mode = apic->irq_dest_mode;
entry.mask = 1; /* mask IRQ now */
- entry.dest = cpu_mask_to_apicid(TARGET_CPUS);
+ entry.dest = cpu_mask_to_apicid(apic->target_cpus());
entry.delivery_mode = apic->irq_delivery_mode;
entry.polarity = 0;
entry.trigger = 0;
@@ -2877,7 +2877,7 @@ static inline void __init check_timer(void)
* get/set the timer IRQ vector:
*/
disable_8259A_irq(0);
- assign_irq_vector(0, cfg, TARGET_CPUS);
+ assign_irq_vector(0, cfg, apic->target_cpus());
/*
* As IRQ0 is to be enabled in the 8259A, the virtual
@@ -3195,7 +3195,7 @@ unsigned int create_irq_nr(unsigned int irq_want)
if (cfg_new->vector != 0)
continue;
- if (__assign_irq_vector(new, cfg_new, TARGET_CPUS) == 0)
+ if (__assign_irq_vector(new, cfg_new, apic->target_cpus()) == 0)
irq = new;
break;
}
@@ -3261,11 +3261,11 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
return -ENXIO;
cfg = irq_cfg(irq);
- err = assign_irq_vector(irq, cfg, TARGET_CPUS);
+ err = assign_irq_vector(irq, cfg, apic->target_cpus());
if (err)
return err;
- dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);
+ dest = cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
#ifdef CONFIG_INTR_REMAP
if (irq_remapped(irq)) {
@@ -3698,12 +3698,12 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
return -ENXIO;
cfg = irq_cfg(irq);
- err = assign_irq_vector(irq, cfg, TARGET_CPUS);
+ err = assign_irq_vector(irq, cfg, apic->target_cpus());
if (!err) {
struct ht_irq_msg msg;
unsigned dest;
- dest = cpu_mask_to_apicid_and(cfg->domain, TARGET_CPUS);
+ dest = cpu_mask_to_apicid_and(cfg->domain, apic->target_cpus());
msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest);
@@ -3987,7 +3987,7 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity)
/*
* This function currently is only a helper for the i386 smp boot process where
* we need to reprogram the ioredtbls to cater for the cpus which have come online
- * so mask in all cases should simply be TARGET_CPUS
+ * so mask in all cases should simply be apic->target_cpus()
*/
#ifdef CONFIG_SMP
void __init setup_ioapic_dest(void)
@@ -4028,7 +4028,7 @@ void __init setup_ioapic_dest(void)
(IRQ_NO_BALANCING | IRQ_AFFINITY_SET))
mask = desc->affinity;
else
- mask = TARGET_CPUS;
+ mask = apic->target_cpus();
#ifdef CONFIG_INTR_REMAP
if (intr_remapping_enabled)
commit 0a9cc20b9c18372ba5a9fea990f5812f3ee01e32
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Jan 28 04:30:40 2009 +0100
x86, apic: clean up target_cpus methods
Impact: cleanup
Clean up all the target_cpus() namespace overlap that exists
between bigsmp, es7000, mach-default, numaq and summit - by
separating the different functions into different names.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h
index dca2d5b01daa..d6aeca3c5a8d 100644
--- a/arch/x86/include/asm/bigsmp/apic.h
+++ b/arch/x86/include/asm/bigsmp/apic.h
@@ -9,7 +9,7 @@ static inline int bigsmp_apic_id_registered(void)
return 1;
}
-static inline const cpumask_t *target_cpus(void)
+static inline const cpumask_t *bigsmp_target_cpus(void)
{
#ifdef CONFIG_SMP
return &cpu_online_map;
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h
index 342416b3fadd..7e5c31a4f8da 100644
--- a/arch/x86/include/asm/es7000/apic.h
+++ b/arch/x86/include/asm/es7000/apic.h
@@ -16,7 +16,7 @@ static inline const cpumask_t *target_cpus_cluster(void)
return &CPU_MASK_ALL;
}
-static inline const cpumask_t *target_cpus(void)
+static inline const cpumask_t *es7000_target_cpus(void)
{
return &cpumask_of_cpu(smp_processor_id());
}
@@ -83,7 +83,7 @@ static inline void setup_apic_routing(void)
printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
(apic_version[apic] == 0x14) ?
"Physical Cluster" : "Logical Cluster",
- nr_ioapics, cpus_addr(*target_cpus())[0]);
+ nr_ioapics, cpus_addr(*es7000_target_cpus())[0]);
}
static inline int multi_timer_check(int apic, int irq)
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
index ce3bc4845b98..af1607ddd2a2 100644
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ b/arch/x86/include/asm/mach-default/mach_apic.h
@@ -8,7 +8,7 @@
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
-static inline const struct cpumask *target_cpus(void)
+static inline const struct cpumask *default_target_cpus(void)
{
#ifdef CONFIG_SMP
return cpu_online_mask;
@@ -33,7 +33,7 @@ static inline const struct cpumask *target_cpus(void)
#define wakeup_secondary_cpu (apic->wakeup_cpu)
extern void setup_apic_routing(void);
#else
-#define TARGET_CPUS (target_cpus())
+#define TARGET_CPUS (default_target_cpus())
#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
/*
* Set up the logical destination ID.
diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h
index a9d846769a02..1111ff9e41de 100644
--- a/arch/x86/include/asm/numaq/apic.h
+++ b/arch/x86/include/asm/numaq/apic.h
@@ -7,7 +7,7 @@
#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
-static inline const cpumask_t *target_cpus(void)
+static inline const cpumask_t *numaq_target_cpus(void)
{
return &CPU_MASK_ALL;
}
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h
index 427d0889f6f2..7c1f9151429c 100644
--- a/arch/x86/include/asm/summit/apic.h
+++ b/arch/x86/include/asm/summit/apic.h
@@ -15,7 +15,7 @@
#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
-static inline const cpumask_t *target_cpus(void)
+static inline const cpumask_t *summit_target_cpus(void)
{
/* CPU_MASK_ALL (0xff) has undefined behaviour with
* dest_LowestPrio mode logical clustered apic interrupt routing
diff --git a/arch/x86/mach-generic/bigsmp.c b/arch/x86/mach-generic/bigsmp.c
index 06be776067ad..d3cead2d2fc8 100644
--- a/arch/x86/mach-generic/bigsmp.c
+++ b/arch/x86/mach-generic/bigsmp.c
@@ -68,7 +68,7 @@ struct genapic apic_bigsmp = {
/* phys delivery to target CPU: */
.irq_dest_mode = 0,
- .target_cpus = target_cpus,
+ .target_cpus = bigsmp_target_cpus,
.ESR_DISABLE = esr_disable,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
diff --git a/arch/x86/mach-generic/default.c b/arch/x86/mach-generic/default.c
index fe97b0114a06..a483e22273e5 100644
--- a/arch/x86/mach-generic/default.c
+++ b/arch/x86/mach-generic/default.c
@@ -35,7 +35,7 @@ struct genapic apic_default = {
/* logical delivery broadcast to all CPUs: */
.irq_dest_mode = 1,
- .target_cpus = target_cpus,
+ .target_cpus = default_target_cpus,
.ESR_DISABLE = esr_disable,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
diff --git a/arch/x86/mach-generic/es7000.c b/arch/x86/mach-generic/es7000.c
index 269a97aef431..e31f0c35470d 100644
--- a/arch/x86/mach-generic/es7000.c
+++ b/arch/x86/mach-generic/es7000.c
@@ -111,7 +111,7 @@ struct genapic apic_es7000 = {
/* phys delivery to target CPUs: */
.irq_dest_mode = 0,
- .target_cpus = target_cpus,
+ .target_cpus = es7000_target_cpus,
.ESR_DISABLE = esr_disable,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
diff --git a/arch/x86/mach-generic/numaq.c b/arch/x86/mach-generic/numaq.c
index 6daddb6949d2..4b84b5970fbe 100644
--- a/arch/x86/mach-generic/numaq.c
+++ b/arch/x86/mach-generic/numaq.c
@@ -55,7 +55,7 @@ struct genapic apic_numaq = {
/* physical delivery on LOCAL quad: */
.irq_dest_mode = 0,
- .target_cpus = target_cpus,
+ .target_cpus = numaq_target_cpus,
.ESR_DISABLE = esr_disable,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
diff --git a/arch/x86/mach-generic/summit.c b/arch/x86/mach-generic/summit.c
index 1b9164b92b0a..e6b956a08484 100644
--- a/arch/x86/mach-generic/summit.c
+++ b/arch/x86/mach-generic/summit.c
@@ -48,7 +48,7 @@ struct genapic apic_summit = {
/* logical delivery broadcast to all CPUs: */
.irq_dest_mode = 1,
- .target_cpus = target_cpus,
+ .target_cpus = summit_target_cpus,
.ESR_DISABLE = esr_disable,
.apic_destination_logical = APIC_DEST_LOGICAL,
.check_apicid_used = check_apicid_used,
commit 7fe732862d9697cc1863286fbcace9a67f231b4c
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Jan 28 04:24:16 2009 +0100
x86, apic: remove IRQ_DEST_MODE
Remove leftover definition.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
index f3b2cd423882..ce3bc4845b98 100644
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ b/arch/x86/include/asm/mach-default/mach_apic.h
@@ -22,7 +22,6 @@ static inline const struct cpumask *target_cpus(void)
#ifdef CONFIG_X86_64
#include <asm/genapic.h>
-#define IRQ_DEST_MODE (apic->irq_dest_mode)
#define TARGET_CPUS (apic->target_cpus())
#define init_apic_ldr (apic->init_apic_ldr)
#define cpu_mask_to_apicid (apic->cpu_mask_to_apicid)
commit 38bd77a6c35168b03b65f7438cdcc1257d550924
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Jan 28 04:16:01 2009 +0100
x86, apic: remove ES7000_IRQ_DELIVERY_MODE and ES7000_IRQ_DEST_MODE
Impact: cleanup
They were only used in a single place and obscured the apic_es7000
driver template.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h
index 690016683f21..342416b3fadd 100644
--- a/arch/x86/include/asm/es7000/apic.h
+++ b/arch/x86/include/asm/es7000/apic.h
@@ -27,8 +27,6 @@ static inline const cpumask_t *target_cpus(void)
#define NO_BALANCE_IRQ_CLUSTER (1)
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
-#define ES7000_IRQ_DELIVERY_MODE (dest_Fixed)
-#define ES7000_IRQ_DEST_MODE (0) /* phys delivery to target procs */
#define NO_BALANCE_IRQ (0)
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL 0x0
diff --git a/arch/x86/mach-generic/es7000.c b/arch/x86/mach-generic/es7000.c
index 5d97408919bb..269a97aef431 100644
--- a/arch/x86/mach-generic/es7000.c
+++ b/arch/x86/mach-generic/es7000.c
@@ -107,8 +107,9 @@ struct genapic apic_es7000 = {
.acpi_madt_oem_check = es7000_acpi_madt_oem_check,
.apic_id_registered = es7000_apic_id_registered,
- .irq_delivery_mode = ES7000_IRQ_DELIVERY_MODE,
- .irq_dest_mode = ES7000_IRQ_DEST_MODE,
+ .irq_delivery_mode = dest_Fixed,
+ /* phys delivery to target CPUs: */
+ .irq_dest_mode = 0,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,
commit d8a3539e64f8e27b0ab5bb7e7ba3b8f34b739224
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Jan 28 04:16:01 2009 +0100
x86, apic: remove BIGSMP_IRQ_DELIVERY_MODE and BIGSMP_IRQ_DEST_MODE
Impact: cleanup
They were only used in a single place and obscured the apic_bigsmp
driver template.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h
index 293551b0e610..dca2d5b01daa 100644
--- a/arch/x86/include/asm/bigsmp/apic.h
+++ b/arch/x86/include/asm/bigsmp/apic.h
@@ -21,8 +21,6 @@ static inline const cpumask_t *target_cpus(void)
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL 0
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
-#define BIGSMP_IRQ_DELIVERY_MODE (dest_Fixed)
-#define BIGSMP_IRQ_DEST_MODE (0) /* phys delivery to target proc */
#define NO_BALANCE_IRQ (0)
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
diff --git a/arch/x86/mach-generic/bigsmp.c b/arch/x86/mach-generic/bigsmp.c
index e8c1ceca7c94..06be776067ad 100644
--- a/arch/x86/mach-generic/bigsmp.c
+++ b/arch/x86/mach-generic/bigsmp.c
@@ -64,8 +64,9 @@ struct genapic apic_bigsmp = {
.acpi_madt_oem_check = NULL,
.apic_id_registered = bigsmp_apic_id_registered,
- .irq_delivery_mode = BIGSMP_IRQ_DELIVERY_MODE,
- .irq_dest_mode = BIGSMP_IRQ_DEST_MODE,
+ .irq_delivery_mode = dest_Fixed,
+ /* phys delivery to target CPU: */
+ .irq_dest_mode = 0,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,
commit 1b1bcb3ff4e4934d949574cec90679219ace5412
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Jan 28 04:16:01 2009 +0100
x86, apic: remove NUMAQ_IRQ_DELIVERY_MODE and NUMAQ_IRQ_DEST_MODE
Impact: cleanup
They were only used in a single place and obscured the apic_numaq template.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h
index 7746035c5911..a9d846769a02 100644
--- a/arch/x86/include/asm/numaq/apic.h
+++ b/arch/x86/include/asm/numaq/apic.h
@@ -15,9 +15,6 @@ static inline const cpumask_t *target_cpus(void)
#define NO_BALANCE_IRQ (1)
#define esr_disable (1)
-#define NUMAQ_IRQ_DELIVERY_MODE dest_LowestPrio
-#define NUMAQ_IRQ_DEST_MODE 0 /* physical delivery on LOCAL quad */
-
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
{
return physid_isset(apicid, bitmap);
diff --git a/arch/x86/mach-generic/numaq.c b/arch/x86/mach-generic/numaq.c
index 77ac66935fdd..6daddb6949d2 100644
--- a/arch/x86/mach-generic/numaq.c
+++ b/arch/x86/mach-generic/numaq.c
@@ -51,8 +51,9 @@ struct genapic apic_numaq = {
.acpi_madt_oem_check = NULL,
.apic_id_registered = numaq_apic_id_registered,
- .irq_delivery_mode = NUMAQ_IRQ_DELIVERY_MODE,
- .irq_dest_mode = NUMAQ_IRQ_DEST_MODE,
+ .irq_delivery_mode = dest_LowestPrio,
+ /* physical delivery on LOCAL quad: */
+ .irq_dest_mode = 0,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,
commit 82daea6b0890f739be1ad4ab1c1b922b1555582e
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Jan 28 04:16:01 2009 +0100
x86, apic: remove SUMMIT_IRQ_DELIVERY_MODE and SUMMIT_IRQ_DEST_MODE
Impact: cleanup
They were only used in a single place and obscured the apic_summit template.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h
index ea2abe9b5979..427d0889f6f2 100644
--- a/arch/x86/include/asm/summit/apic.h
+++ b/arch/x86/include/asm/summit/apic.h
@@ -24,9 +24,6 @@ static inline const cpumask_t *target_cpus(void)
return &cpumask_of_cpu(0);
}
-#define SUMMIT_IRQ_DELIVERY_MODE (dest_LowestPrio)
-#define SUMMIT_IRQ_DEST_MODE 1 /* logical delivery broadcast to all procs */
-
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
{
return 0;
diff --git a/arch/x86/mach-generic/summit.c b/arch/x86/mach-generic/summit.c
index 7b3f43caf2ae..1b9164b92b0a 100644
--- a/arch/x86/mach-generic/summit.c
+++ b/arch/x86/mach-generic/summit.c
@@ -44,8 +44,9 @@ struct genapic apic_summit = {
.acpi_madt_oem_check = summit_acpi_madt_oem_check,
.apic_id_registered = summit_apic_id_registered,
- .irq_delivery_mode = SUMMIT_IRQ_DELIVERY_MODE,
- .irq_dest_mode = SUMMIT_IRQ_DEST_MODE,
+ .irq_delivery_mode = dest_LowestPrio,
+ /* logical delivery broadcast to all CPUs: */
+ .irq_dest_mode = 1,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,
commit dcafa4a8c95ce063cbae0a5e61632bc3c4924e66
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Jan 28 04:16:01 2009 +0100
x86, apic: remove DEFAULT_IRQ_DELIVERY_MODE and DEFAULT_IRQ_DEST_MODE
Impact: cleanup
They were only used in a single place and obscured the apic_default template.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
index eafbf4f20387..f3b2cd423882 100644
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ b/arch/x86/include/asm/mach-default/mach_apic.h
@@ -34,8 +34,6 @@ static inline const struct cpumask *target_cpus(void)
#define wakeup_secondary_cpu (apic->wakeup_cpu)
extern void setup_apic_routing(void);
#else
-#define DEFAULT_IRQ_DELIVERY_MODE dest_LowestPrio
-#define DEFAULT_IRQ_DEST_MODE 1 /* logical delivery broadcast to all procs */
#define TARGET_CPUS (target_cpus())
#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
/*
diff --git a/arch/x86/mach-generic/default.c b/arch/x86/mach-generic/default.c
index 0482106f0e19..fe97b0114a06 100644
--- a/arch/x86/mach-generic/default.c
+++ b/arch/x86/mach-generic/default.c
@@ -31,8 +31,9 @@ struct genapic apic_default = {
.acpi_madt_oem_check = NULL,
.apic_id_registered = default_apic_id_registered,
- .irq_delivery_mode = DEFAULT_IRQ_DELIVERY_MODE,
- .irq_dest_mode = DEFAULT_IRQ_DEST_MODE,
+ .irq_delivery_mode = dest_LowestPrio,
+ /* logical delivery broadcast to all CPUs: */
+ .irq_dest_mode = 1,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,
commit 9b5bc8dc12421a4b17047061f473d85c1797d543
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Jan 28 04:09:58 2009 +0100
x86, apic: remove IRQ_DEST_MODE / IRQ_DELIVERY_MODE
Remove the wrapper macros IRQ_DEST_MODE and IRQ_DELIVERY_MODE.
The typical 32-bit and the 64-bit build all dereference via the genapic,
so it's pointless to hide that indirection via these ugly macros.
Furthermore, it also obscures subarchitecture details.
So replace it with apic->irq_dest_mode / etc. accesses.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h
index 8ff8bba88338..293551b0e610 100644
--- a/arch/x86/include/asm/bigsmp/apic.h
+++ b/arch/x86/include/asm/bigsmp/apic.h
@@ -21,8 +21,8 @@ static inline const cpumask_t *target_cpus(void)
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL 0
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
-#define IRQ_DELIVERY_MODE (dest_Fixed)
-#define IRQ_DEST_MODE (0) /* phys delivery to target proc */
+#define BIGSMP_IRQ_DELIVERY_MODE (dest_Fixed)
+#define BIGSMP_IRQ_DEST_MODE (0) /* phys delivery to target proc */
#define NO_BALANCE_IRQ (0)
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h
index 830e8731cc05..690016683f21 100644
--- a/arch/x86/include/asm/es7000/apic.h
+++ b/arch/x86/include/asm/es7000/apic.h
@@ -27,8 +27,8 @@ static inline const cpumask_t *target_cpus(void)
#define NO_BALANCE_IRQ_CLUSTER (1)
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
-#define IRQ_DELIVERY_MODE (dest_Fixed)
-#define IRQ_DEST_MODE (0) /* phys delivery to target procs */
+#define ES7000_IRQ_DELIVERY_MODE (dest_Fixed)
+#define ES7000_IRQ_DEST_MODE (0) /* phys delivery to target procs */
#define NO_BALANCE_IRQ (0)
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL 0x0
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
index b5364793262a..eafbf4f20387 100644
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ b/arch/x86/include/asm/mach-default/mach_apic.h
@@ -22,7 +22,6 @@ static inline const struct cpumask *target_cpus(void)
#ifdef CONFIG_X86_64
#include <asm/genapic.h>
-#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)
#define IRQ_DEST_MODE (apic->irq_dest_mode)
#define TARGET_CPUS (apic->target_cpus())
#define init_apic_ldr (apic->init_apic_ldr)
@@ -35,8 +34,8 @@ static inline const struct cpumask *target_cpus(void)
#define wakeup_secondary_cpu (apic->wakeup_cpu)
extern void setup_apic_routing(void);
#else
-#define IRQ_DELIVERY_MODE dest_LowestPrio
-#define IRQ_DEST_MODE 1 /* logical delivery broadcast to all procs */
+#define DEFAULT_IRQ_DELIVERY_MODE dest_LowestPrio
+#define DEFAULT_IRQ_DEST_MODE 1 /* logical delivery broadcast to all procs */
#define TARGET_CPUS (target_cpus())
#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
/*
diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h
index 03492f2219ed..387a5d00c43d 100644
--- a/arch/x86/include/asm/mach-generic/mach_apic.h
+++ b/arch/x86/include/asm/mach-generic/mach_apic.h
@@ -5,8 +5,6 @@
#define esr_disable (apic->ESR_DISABLE)
#define NO_BALANCE_IRQ (apic->no_balance_irq)
-#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)
-#define IRQ_DEST_MODE (apic->irq_dest_mode)
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL (apic->apic_destination_logical)
#define TARGET_CPUS (apic->target_cpus())
diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h
index d885e35df18e..7746035c5911 100644
--- a/arch/x86/include/asm/numaq/apic.h
+++ b/arch/x86/include/asm/numaq/apic.h
@@ -15,8 +15,8 @@ static inline const cpumask_t *target_cpus(void)
#define NO_BALANCE_IRQ (1)
#define esr_disable (1)
-#define IRQ_DELIVERY_MODE dest_LowestPrio
-#define IRQ_DEST_MODE 0 /* physical delivery on LOCAL quad */
+#define NUMAQ_IRQ_DELIVERY_MODE dest_LowestPrio
+#define NUMAQ_IRQ_DEST_MODE 0 /* physical delivery on LOCAL quad */
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
{
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h
index 0b7d0d14e568..ea2abe9b5979 100644
--- a/arch/x86/include/asm/summit/apic.h
+++ b/arch/x86/include/asm/summit/apic.h
@@ -24,8 +24,8 @@ static inline const cpumask_t *target_cpus(void)
return &cpumask_of_cpu(0);
}
-#define IRQ_DELIVERY_MODE (dest_LowestPrio)
-#define IRQ_DEST_MODE 1 /* logical delivery broadcast to all procs */
+#define SUMMIT_IRQ_DELIVERY_MODE (dest_LowestPrio)
+#define SUMMIT_IRQ_DEST_MODE 1 /* logical delivery broadcast to all procs */
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
{
diff --git a/arch/x86/kernel/io_apic.c b/arch/x86/kernel/io_apic.c
index 5f967b9c9afd..301b6571d700 100644
--- a/arch/x86/kernel/io_apic.c
+++ b/arch/x86/kernel/io_apic.c
@@ -1514,9 +1514,9 @@ static int setup_ioapic_entry(int apic_id, int irq,
memset(&irte, 0, sizeof(irte));
irte.present = 1;
- irte.dst_mode = IRQ_DEST_MODE;
+ irte.dst_mode = apic->irq_dest_mode;
irte.trigger_mode = trigger;
- irte.dlvry_mode = IRQ_DELIVERY_MODE;
+ irte.dlvry_mode = apic->irq_delivery_mode;
irte.vector = vector;
irte.dest_id = IRTE_DEST(destination);
@@ -1529,8 +1529,8 @@ static int setup_ioapic_entry(int apic_id, int irq,
} else
#endif
{
- entry->delivery_mode = IRQ_DELIVERY_MODE;
- entry->dest_mode = IRQ_DEST_MODE;
+ entry->delivery_mode = apic->irq_delivery_mode;
+ entry->dest_mode = apic->irq_dest_mode;
entry->dest = destination;
}
@@ -1659,10 +1659,10 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin,
* We use logical delivery to get the timer IRQ
* to the first CPU.
*/
- entry.dest_mode = IRQ_DEST_MODE;
+ entry.dest_mode = apic->irq_dest_mode;
entry.mask = 1; /* mask IRQ now */
entry.dest = cpu_mask_to_apicid(TARGET_CPUS);
- entry.delivery_mode = IRQ_DELIVERY_MODE;
+ entry.delivery_mode = apic->irq_delivery_mode;
entry.polarity = 0;
entry.trigger = 0;
entry.vector = vector;
@@ -3279,9 +3279,9 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
memset (&irte, 0, sizeof(irte));
irte.present = 1;
- irte.dst_mode = IRQ_DEST_MODE;
+ irte.dst_mode = apic->irq_dest_mode;
irte.trigger_mode = 0; /* edge */
- irte.dlvry_mode = IRQ_DELIVERY_MODE;
+ irte.dlvry_mode = apic->irq_delivery_mode;
irte.vector = cfg->vector;
irte.dest_id = IRTE_DEST(dest);
@@ -3299,10 +3299,10 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
msg->address_hi = MSI_ADDR_BASE_HI;
msg->address_lo =
MSI_ADDR_BASE_LO |
- ((IRQ_DEST_MODE == 0) ?
+ ((apic->irq_dest_mode == 0) ?
MSI_ADDR_DEST_MODE_PHYSICAL:
MSI_ADDR_DEST_MODE_LOGICAL) |
- ((IRQ_DELIVERY_MODE != dest_LowestPrio) ?
+ ((apic->irq_delivery_mode != dest_LowestPrio) ?
MSI_ADDR_REDIRECTION_CPU:
MSI_ADDR_REDIRECTION_LOWPRI) |
MSI_ADDR_DEST_ID(dest);
@@ -3310,7 +3310,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
msg->data =
MSI_DATA_TRIGGER_EDGE |
MSI_DATA_LEVEL_ASSERT |
- ((IRQ_DELIVERY_MODE != dest_LowestPrio) ?
+ ((apic->irq_delivery_mode != dest_LowestPrio) ?
MSI_DATA_DELIVERY_FIXED:
MSI_DATA_DELIVERY_LOWPRI) |
MSI_DATA_VECTOR(cfg->vector);
@@ -3711,11 +3711,11 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
HT_IRQ_LOW_BASE |
HT_IRQ_LOW_DEST_ID(dest) |
HT_IRQ_LOW_VECTOR(cfg->vector) |
- ((IRQ_DEST_MODE == 0) ?
+ ((apic->irq_dest_mode == 0) ?
HT_IRQ_LOW_DM_PHYSICAL :
HT_IRQ_LOW_DM_LOGICAL) |
HT_IRQ_LOW_RQEOI_EDGE |
- ((IRQ_DELIVERY_MODE != dest_LowestPrio) ?
+ ((apic->irq_delivery_mode != dest_LowestPrio) ?
HT_IRQ_LOW_MT_FIXED :
HT_IRQ_LOW_MT_ARBITRATED) |
HT_IRQ_LOW_IRQ_MASKED;
@@ -3763,8 +3763,8 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
entry->vector = cfg->vector;
- entry->delivery_mode = IRQ_DELIVERY_MODE;
- entry->dest_mode = IRQ_DEST_MODE;
+ entry->delivery_mode = apic->irq_delivery_mode;
+ entry->dest_mode = apic->irq_dest_mode;
entry->polarity = 0;
entry->trigger = 0;
entry->mask = 0;
diff --git a/arch/x86/mach-generic/bigsmp.c b/arch/x86/mach-generic/bigsmp.c
index c15c1aa2dc7f..e8c1ceca7c94 100644
--- a/arch/x86/mach-generic/bigsmp.c
+++ b/arch/x86/mach-generic/bigsmp.c
@@ -64,8 +64,8 @@ struct genapic apic_bigsmp = {
.acpi_madt_oem_check = NULL,
.apic_id_registered = bigsmp_apic_id_registered,
- .irq_delivery_mode = IRQ_DELIVERY_MODE,
- .irq_dest_mode = IRQ_DEST_MODE,
+ .irq_delivery_mode = BIGSMP_IRQ_DELIVERY_MODE,
+ .irq_dest_mode = BIGSMP_IRQ_DEST_MODE,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,
diff --git a/arch/x86/mach-generic/default.c b/arch/x86/mach-generic/default.c
index d32b175eff88..0482106f0e19 100644
--- a/arch/x86/mach-generic/default.c
+++ b/arch/x86/mach-generic/default.c
@@ -31,8 +31,8 @@ struct genapic apic_default = {
.acpi_madt_oem_check = NULL,
.apic_id_registered = default_apic_id_registered,
- .irq_delivery_mode = IRQ_DELIVERY_MODE,
- .irq_dest_mode = IRQ_DEST_MODE,
+ .irq_delivery_mode = DEFAULT_IRQ_DELIVERY_MODE,
+ .irq_dest_mode = DEFAULT_IRQ_DEST_MODE,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,
diff --git a/arch/x86/mach-generic/es7000.c b/arch/x86/mach-generic/es7000.c
index 06653892953e..5d97408919bb 100644
--- a/arch/x86/mach-generic/es7000.c
+++ b/arch/x86/mach-generic/es7000.c
@@ -107,8 +107,8 @@ struct genapic apic_es7000 = {
.acpi_madt_oem_check = es7000_acpi_madt_oem_check,
.apic_id_registered = es7000_apic_id_registered,
- .irq_delivery_mode = IRQ_DELIVERY_MODE,
- .irq_dest_mode = IRQ_DEST_MODE,
+ .irq_delivery_mode = ES7000_IRQ_DELIVERY_MODE,
+ .irq_dest_mode = ES7000_IRQ_DEST_MODE,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,
diff --git a/arch/x86/mach-generic/numaq.c b/arch/x86/mach-generic/numaq.c
index 401957142fda..77ac66935fdd 100644
--- a/arch/x86/mach-generic/numaq.c
+++ b/arch/x86/mach-generic/numaq.c
@@ -51,8 +51,8 @@ struct genapic apic_numaq = {
.acpi_madt_oem_check = NULL,
.apic_id_registered = numaq_apic_id_registered,
- .irq_delivery_mode = IRQ_DELIVERY_MODE,
- .irq_dest_mode = IRQ_DEST_MODE,
+ .irq_delivery_mode = NUMAQ_IRQ_DELIVERY_MODE,
+ .irq_dest_mode = NUMAQ_IRQ_DEST_MODE,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,
diff --git a/arch/x86/mach-generic/summit.c b/arch/x86/mach-generic/summit.c
index 946da7aa7622..7b3f43caf2ae 100644
--- a/arch/x86/mach-generic/summit.c
+++ b/arch/x86/mach-generic/summit.c
@@ -44,8 +44,8 @@ struct genapic apic_summit = {
.acpi_madt_oem_check = summit_acpi_madt_oem_check,
.apic_id_registered = summit_apic_id_registered,
- .irq_delivery_mode = IRQ_DELIVERY_MODE,
- .irq_dest_mode = IRQ_DEST_MODE,
+ .irq_delivery_mode = SUMMIT_IRQ_DELIVERY_MODE,
+ .irq_dest_mode = SUMMIT_IRQ_DEST_MODE,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,
commit f8987a1093cc7a896137e264c24e04d4048e9f95
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Jan 28 04:02:31 2009 +0100
x86, genapic: rename int_delivery_mode, et. al.
int_delivery_mode is supposed to mean 'interrupt delivery mode', but
it's quite a misnomer as 'int' we usually think of as an integer type ...
The standard naming for such attributes is 'irq' - so rename the following
fields and macros:
int_delivery_mode => irq_delivery_mode
INT_DELIVERY_MODE => IRQ_DELIVERY_MODE
int_dest_mode => irq_dest_mode
INT_DEST_MODE => IRQ_DEST_MODE
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/include/asm/bigsmp/apic.h b/arch/x86/include/asm/bigsmp/apic.h
index 42c56df3ff32..8ff8bba88338 100644
--- a/arch/x86/include/asm/bigsmp/apic.h
+++ b/arch/x86/include/asm/bigsmp/apic.h
@@ -21,8 +21,8 @@ static inline const cpumask_t *target_cpus(void)
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL 0
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
-#define INT_DELIVERY_MODE (dest_Fixed)
-#define INT_DEST_MODE (0) /* phys delivery to target proc */
+#define IRQ_DELIVERY_MODE (dest_Fixed)
+#define IRQ_DEST_MODE (0) /* phys delivery to target proc */
#define NO_BALANCE_IRQ (0)
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
diff --git a/arch/x86/include/asm/es7000/apic.h b/arch/x86/include/asm/es7000/apic.h
index a1819b510de3..830e8731cc05 100644
--- a/arch/x86/include/asm/es7000/apic.h
+++ b/arch/x86/include/asm/es7000/apic.h
@@ -27,8 +27,8 @@ static inline const cpumask_t *target_cpus(void)
#define NO_BALANCE_IRQ_CLUSTER (1)
#define APIC_DFR_VALUE (APIC_DFR_FLAT)
-#define INT_DELIVERY_MODE (dest_Fixed)
-#define INT_DEST_MODE (0) /* phys delivery to target procs */
+#define IRQ_DELIVERY_MODE (dest_Fixed)
+#define IRQ_DEST_MODE (0) /* phys delivery to target procs */
#define NO_BALANCE_IRQ (0)
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL 0x0
diff --git a/arch/x86/include/asm/genapic.h b/arch/x86/include/asm/genapic.h
index 108abdf6953b..e998e3df5d23 100644
--- a/arch/x86/include/asm/genapic.h
+++ b/arch/x86/include/asm/genapic.h
@@ -23,8 +23,8 @@ struct genapic {
int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
int (*apic_id_registered)(void);
- u32 int_delivery_mode;
- u32 int_dest_mode;
+ u32 irq_delivery_mode;
+ u32 irq_dest_mode;
const struct cpumask *(*target_cpus)(void);
diff --git a/arch/x86/include/asm/mach-default/mach_apic.h b/arch/x86/include/asm/mach-default/mach_apic.h
index 6a454fa0b433..b5364793262a 100644
--- a/arch/x86/include/asm/mach-default/mach_apic.h
+++ b/arch/x86/include/asm/mach-default/mach_apic.h
@@ -22,8 +22,8 @@ static inline const struct cpumask *target_cpus(void)
#ifdef CONFIG_X86_64
#include <asm/genapic.h>
-#define INT_DELIVERY_MODE (apic->int_delivery_mode)
-#define INT_DEST_MODE (apic->int_dest_mode)
+#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)
+#define IRQ_DEST_MODE (apic->irq_dest_mode)
#define TARGET_CPUS (apic->target_cpus())
#define init_apic_ldr (apic->init_apic_ldr)
#define cpu_mask_to_apicid (apic->cpu_mask_to_apicid)
@@ -35,8 +35,8 @@ static inline const struct cpumask *target_cpus(void)
#define wakeup_secondary_cpu (apic->wakeup_cpu)
extern void setup_apic_routing(void);
#else
-#define INT_DELIVERY_MODE dest_LowestPrio
-#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
+#define IRQ_DELIVERY_MODE dest_LowestPrio
+#define IRQ_DEST_MODE 1 /* logical delivery broadcast to all procs */
#define TARGET_CPUS (target_cpus())
#define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
/*
diff --git a/arch/x86/include/asm/mach-generic/mach_apic.h b/arch/x86/include/asm/mach-generic/mach_apic.h
index cc6e9d70f06e..03492f2219ed 100644
--- a/arch/x86/include/asm/mach-generic/mach_apic.h
+++ b/arch/x86/include/asm/mach-generic/mach_apic.h
@@ -5,8 +5,8 @@
#define esr_disable (apic->ESR_DISABLE)
#define NO_BALANCE_IRQ (apic->no_balance_irq)
-#define INT_DELIVERY_MODE (apic->int_delivery_mode)
-#define INT_DEST_MODE (apic->int_dest_mode)
+#define IRQ_DELIVERY_MODE (apic->irq_delivery_mode)
+#define IRQ_DEST_MODE (apic->irq_dest_mode)
#undef APIC_DEST_LOGICAL
#define APIC_DEST_LOGICAL (apic->apic_destination_logical)
#define TARGET_CPUS (apic->target_cpus())
diff --git a/arch/x86/include/asm/numaq/apic.h b/arch/x86/include/asm/numaq/apic.h
index 59b62b19d02c..d885e35df18e 100644
--- a/arch/x86/include/asm/numaq/apic.h
+++ b/arch/x86/include/asm/numaq/apic.h
@@ -15,8 +15,8 @@ static inline const cpumask_t *target_cpus(void)
#define NO_BALANCE_IRQ (1)
#define esr_disable (1)
-#define INT_DELIVERY_MODE dest_LowestPrio
-#define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */
+#define IRQ_DELIVERY_MODE dest_LowestPrio
+#define IRQ_DEST_MODE 0 /* physical delivery on LOCAL quad */
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
{
diff --git a/arch/x86/include/asm/summit/apic.h b/arch/x86/include/asm/summit/apic.h
index a36ef6e4b1ff..0b7d0d14e568 100644
--- a/arch/x86/include/asm/summit/apic.h
+++ b/arch/x86/include/asm/summit/apic.h
@@ -24,8 +24,8 @@ static inline const cpumask_t *target_cpus(void)
return &cpumask_of_cpu(0);
}
-#define INT_DELIVERY_MODE (dest_LowestPrio)
-#define INT_DEST_MODE 1 /* logical delivery broadcast to all procs */
+#define IRQ_DELIVERY_MODE (dest_LowestPrio)
+#define IRQ_DEST_MODE 1 /* logical delivery broadcast to all procs */
static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
{
diff --git a/arch/x86/kernel/genapic_flat_64.c b/arch/x86/kernel/genapic_flat_64.c
index e9233374cef1..0a263d6bb5e2 100644
--- a/arch/x86/kernel/genapic_flat_64.c
+++ b/arch/x86/kernel/genapic_flat_64.c
@@ -180,8 +180,8 @@ struct genapic apic_flat = {
.acpi_madt_oem_check = flat_acpi_madt_oem_check,
.apic_id_registered = flat_apic_id_registered,
- .int_delivery_mode = dest_LowestPrio,
- .int_dest_mode = (APIC_DEST_LOGICAL != 0),
+ .irq_delivery_mode = dest_LowestPrio,
+ .irq_dest_mode = (APIC_DEST_LOGICAL != 0),
.target_cpus = flat_target_cpus,
.ESR_DISABLE = 0,
@@ -326,8 +326,8 @@ struct genapic apic_physflat = {
.acpi_madt_oem_check = physflat_acpi_madt_oem_check,
.apic_id_registered = flat_apic_id_registered,
- .int_delivery_mode = dest_Fixed,
- .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
+ .irq_delivery_mode = dest_Fixed,
+ .irq_dest_mode = (APIC_DEST_PHYSICAL != 0),
.target_cpus = physflat_target_cpus,
.ESR_DISABLE = 0,
diff --git a/arch/x86/kernel/genx2apic_cluster.c b/arch/x86/kernel/genx2apic_cluster.c
index fc855e503ac4..e9ff7dc9a0f6 100644
--- a/arch/x86/kernel/genx2apic_cluster.c
+++ b/arch/x86/kernel/genx2apic_cluster.c
@@ -182,8 +182,8 @@ struct genapic apic_x2apic_cluster = {
.acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
.apic_id_registered = x2apic_apic_id_registered,
- .int_delivery_mode = dest_LowestPrio,
- .int_dest_mode = (APIC_DEST_LOGICAL != 0),
+ .irq_delivery_mode = dest_LowestPrio,
+ .irq_dest_mode = (APIC_DEST_LOGICAL != 0),
.target_cpus = x2apic_target_cpus,
.ESR_DISABLE = 0,
diff --git a/arch/x86/kernel/genx2apic_phys.c b/arch/x86/kernel/genx2apic_phys.c
index c98361fb7ee1..8141b5a88f61 100644
--- a/arch/x86/kernel/genx2apic_phys.c
+++ b/arch/x86/kernel/genx2apic_phys.c
@@ -178,8 +178,8 @@ struct genapic apic_x2apic_phys = {
.acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
.apic_id_registered = x2apic_apic_id_registered,
- .int_delivery_mode = dest_Fixed,
- .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
+ .irq_delivery_mode = dest_Fixed,
+ .irq_dest_mode = (APIC_DEST_PHYSICAL != 0),
.target_cpus = x2apic_target_cpus,
.ESR_DISABLE = 0,
diff --git a/arch/x86/kernel/genx2apic_uv_x.c b/arch/x86/kernel/genx2apic_uv_x.c
index 94f606f204a1..6a73cad0d3e9 100644
--- a/arch/x86/kernel/genx2apic_uv_x.c
+++ b/arch/x86/kernel/genx2apic_uv_x.c
@@ -243,8 +243,8 @@ struct genapic apic_x2apic_uv_x = {
.acpi_madt_oem_check = uv_acpi_madt_oem_check,
.apic_id_registered = uv_apic_id_registered,
- .int_delivery_mode = dest_Fixed,
- .int_dest_mode = (APIC_DEST_PHYSICAL != 0),
+ .irq_delivery_mode = dest_Fixed,
+ .irq_dest_mode = (APIC_DEST_PHYSICAL != 0),
.target_cpus = uv_target_cpus,
.ESR_DISABLE = 0,
diff --git a/arch/x86/kernel/io_apic.c b/arch/x86/kernel/io_apic.c
index 7283234229fe..5f967b9c9afd 100644
--- a/arch/x86/kernel/io_apic.c
+++ b/arch/x86/kernel/io_apic.c
@@ -1514,9 +1514,9 @@ static int setup_ioapic_entry(int apic_id, int irq,
memset(&irte, 0, sizeof(irte));
irte.present = 1;
- irte.dst_mode = INT_DEST_MODE;
+ irte.dst_mode = IRQ_DEST_MODE;
irte.trigger_mode = trigger;
- irte.dlvry_mode = INT_DELIVERY_MODE;
+ irte.dlvry_mode = IRQ_DELIVERY_MODE;
irte.vector = vector;
irte.dest_id = IRTE_DEST(destination);
@@ -1529,8 +1529,8 @@ static int setup_ioapic_entry(int apic_id, int irq,
} else
#endif
{
- entry->delivery_mode = INT_DELIVERY_MODE;
- entry->dest_mode = INT_DEST_MODE;
+ entry->delivery_mode = IRQ_DELIVERY_MODE;
+ entry->dest_mode = IRQ_DEST_MODE;
entry->dest = destination;
}
@@ -1659,10 +1659,10 @@ static void __init setup_timer_IRQ0_pin(unsigned int apic_id, unsigned int pin,
* We use logical delivery to get the timer IRQ
* to the first CPU.
*/
- entry.dest_mode = INT_DEST_MODE;
+ entry.dest_mode = IRQ_DEST_MODE;
entry.mask = 1; /* mask IRQ now */
entry.dest = cpu_mask_to_apicid(TARGET_CPUS);
- entry.delivery_mode = INT_DELIVERY_MODE;
+ entry.delivery_mode = IRQ_DELIVERY_MODE;
entry.polarity = 0;
entry.trigger = 0;
entry.vector = vector;
@@ -3279,9 +3279,9 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
memset (&irte, 0, sizeof(irte));
irte.present = 1;
- irte.dst_mode = INT_DEST_MODE;
+ irte.dst_mode = IRQ_DEST_MODE;
irte.trigger_mode = 0; /* edge */
- irte.dlvry_mode = INT_DELIVERY_MODE;
+ irte.dlvry_mode = IRQ_DELIVERY_MODE;
irte.vector = cfg->vector;
irte.dest_id = IRTE_DEST(dest);
@@ -3299,10 +3299,10 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
msg->address_hi = MSI_ADDR_BASE_HI;
msg->address_lo =
MSI_ADDR_BASE_LO |
- ((INT_DEST_MODE == 0) ?
+ ((IRQ_DEST_MODE == 0) ?
MSI_ADDR_DEST_MODE_PHYSICAL:
MSI_ADDR_DEST_MODE_LOGICAL) |
- ((INT_DELIVERY_MODE != dest_LowestPrio) ?
+ ((IRQ_DELIVERY_MODE != dest_LowestPrio) ?
MSI_ADDR_REDIRECTION_CPU:
MSI_ADDR_REDIRECTION_LOWPRI) |
MSI_ADDR_DEST_ID(dest);
@@ -3310,7 +3310,7 @@ static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_ms
msg->data =
MSI_DATA_TRIGGER_EDGE |
MSI_DATA_LEVEL_ASSERT |
- ((INT_DELIVERY_MODE != dest_LowestPrio) ?
+ ((IRQ_DELIVERY_MODE != dest_LowestPrio) ?
MSI_DATA_DELIVERY_FIXED:
MSI_DATA_DELIVERY_LOWPRI) |
MSI_DATA_VECTOR(cfg->vector);
@@ -3711,11 +3711,11 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
HT_IRQ_LOW_BASE |
HT_IRQ_LOW_DEST_ID(dest) |
HT_IRQ_LOW_VECTOR(cfg->vector) |
- ((INT_DEST_MODE == 0) ?
+ ((IRQ_DEST_MODE == 0) ?
HT_IRQ_LOW_DM_PHYSICAL :
HT_IRQ_LOW_DM_LOGICAL) |
HT_IRQ_LOW_RQEOI_EDGE |
- ((INT_DELIVERY_MODE != dest_LowestPrio) ?
+ ((IRQ_DELIVERY_MODE != dest_LowestPrio) ?
HT_IRQ_LOW_MT_FIXED :
HT_IRQ_LOW_MT_ARBITRATED) |
HT_IRQ_LOW_IRQ_MASKED;
@@ -3763,8 +3763,8 @@ int arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade,
BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
entry->vector = cfg->vector;
- entry->delivery_mode = INT_DELIVERY_MODE;
- entry->dest_mode = INT_DEST_MODE;
+ entry->delivery_mode = IRQ_DELIVERY_MODE;
+ entry->dest_mode = IRQ_DEST_MODE;
entry->polarity = 0;
entry->trigger = 0;
entry->mask = 0;
diff --git a/arch/x86/mach-generic/bigsmp.c b/arch/x86/mach-generic/bigsmp.c
index 17abf5c62429..c15c1aa2dc7f 100644
--- a/arch/x86/mach-generic/bigsmp.c
+++ b/arch/x86/mach-generic/bigsmp.c
@@ -64,8 +64,8 @@ struct genapic apic_bigsmp = {
.acpi_madt_oem_check = NULL,
.apic_id_registered = bigsmp_apic_id_registered,
- .int_delivery_mode = INT_DELIVERY_MODE,
- .int_dest_mode = INT_DEST_MODE,
+ .irq_delivery_mode = IRQ_DELIVERY_MODE,
+ .irq_dest_mode = IRQ_DEST_MODE,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,
diff --git a/arch/x86/mach-generic/default.c b/arch/x86/mach-generic/default.c
index 1f30559e9d8d..d32b175eff88 100644
--- a/arch/x86/mach-generic/default.c
+++ b/arch/x86/mach-generic/default.c
@@ -31,8 +31,8 @@ struct genapic apic_default = {
.acpi_madt_oem_check = NULL,
.apic_id_registered = default_apic_id_registered,
- .int_delivery_mode = INT_DELIVERY_MODE,
- .int_dest_mode = INT_DEST_MODE,
+ .irq_delivery_mode = IRQ_DELIVERY_MODE,
+ .irq_dest_mode = IRQ_DEST_MODE,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,
diff --git a/arch/x86/mach-generic/es7000.c b/arch/x86/mach-generic/es7000.c
index d68ca0bce675..06653892953e 100644
--- a/arch/x86/mach-generic/es7000.c
+++ b/arch/x86/mach-generic/es7000.c
@@ -21,8 +21,8 @@
void __init es7000_update_genapic_to_cluster(void)
{
apic->target_cpus = target_cpus_cluster;
- apic->int_delivery_mode = INT_DELIVERY_MODE_CLUSTER;
- apic->int_dest_mode = INT_DEST_MODE_CLUSTER;
+ apic->irq_delivery_mode = INT_DELIVERY_MODE_CLUSTER;
+ apic->irq_dest_mode = INT_DEST_MODE_CLUSTER;
apic->no_balance_irq = NO_BALANCE_IRQ_CLUSTER;
apic->init_apic_ldr = init_apic_ldr_cluster;
@@ -107,8 +107,8 @@ struct genapic apic_es7000 = {
.acpi_madt_oem_check = es7000_acpi_madt_oem_check,
.apic_id_registered = es7000_apic_id_registered,
- .int_delivery_mode = INT_DELIVERY_MODE,
- .int_dest_mode = INT_DEST_MODE,
+ .irq_delivery_mode = IRQ_DELIVERY_MODE,
+ .irq_dest_mode = IRQ_DEST_MODE,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,
diff --git a/arch/x86/mach-generic/numaq.c b/arch/x86/mach-generic/numaq.c
index b22a79b15b19..401957142fda 100644
--- a/arch/x86/mach-generic/numaq.c
+++ b/arch/x86/mach-generic/numaq.c
@@ -51,8 +51,8 @@ struct genapic apic_numaq = {
.acpi_madt_oem_check = NULL,
.apic_id_registered = numaq_apic_id_registered,
- .int_delivery_mode = INT_DELIVERY_MODE,
- .int_dest_mode = INT_DEST_MODE,
+ .irq_delivery_mode = IRQ_DELIVERY_MODE,
+ .irq_dest_mode = IRQ_DEST_MODE,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,
diff --git a/arch/x86/mach-generic/summit.c b/arch/x86/mach-generic/summit.c
index 744fa1b86ef4..946da7aa7622 100644
--- a/arch/x86/mach-generic/summit.c
+++ b/arch/x86/mach-generic/summit.c
@@ -44,8 +44,8 @@ struct genapic apic_summit = {
.acpi_madt_oem_check = summit_acpi_madt_oem_check,
.apic_id_registered = summit_apic_id_registered,
- .int_delivery_mode = INT_DELIVERY_MODE,
- .int_dest_mode = INT_DEST_MODE,
+ .irq_delivery_mode = IRQ_DELIVERY_MODE,
+ .irq_dest_mode = IRQ_DEST_MODE,
.target_cpus = target_cpus,
.ESR_DISABLE = esr_disable,