Patches contributed by Eötvös Lorand University
commit f648972e017659c741bdd3be6b4aeb2d73672031
Merge: 8c56250f4834 adee14b2e155
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Sep 10 13:48:17 2008 +0200
Merge commit 'v2.6.27-rc6' into core/locking
commit e92b4fdacc6a7d8cc7895b81347671d5fcd6c5e1
Merge: 9fcaff0e660d adee14b2e155
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Sep 10 11:32:52 2008 +0200
Merge commit 'v2.6.27-rc6' into x86/iommu
commit 6003ab0bad4cc56f3c4fadf62a0d23a967b9c53b
Merge: ab7476cf76e5 adee14b2e155
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Sep 10 09:09:51 2008 +0200
Merge branch 'linus' into core/debug
Conflicts:
lib/vsprintf.c
Manual merge:
include/linux/kernel.h
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --cc include/linux/kernel.h
index 4e1366b552ae,2651f805ba6d..3f30557be2a3
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@@ -187,9 -187,6 +187,8 @@@ extern unsigned long long memparse(cha
extern int core_kernel_text(unsigned long addr);
extern int __kernel_text_address(unsigned long addr);
extern int kernel_text_address(unsigned long addr);
+extern int func_ptr_is_kernel_text(void *ptr);
- extern void *dereference_function_descriptor(void *ptr);
+
struct pid;
extern struct pid *session_of_pgrp(struct pid *pgrp);
commit fb822db465bd9fd4208eef1af4490539b236c54e
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Aug 20 11:17:40 2008 +0200
softlockup: increase hung tasks check from 2 minutes to 8 minutes
Andrew says:
> Seems that about 100% of the reports we get of this warning triggering
> are sys_sync, transaction commit, etc.
increase the timeout. If it still triggers for people, we can kill it.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/kernel/softlockup.c b/kernel/softlockup.c
index b75b492fbfcf..17a058065331 100644
--- a/kernel/softlockup.c
+++ b/kernel/softlockup.c
@@ -164,7 +164,7 @@ unsigned long __read_mostly sysctl_hung_task_check_count = 1024;
/*
* Zero means infinite timeout - no checking done:
*/
-unsigned long __read_mostly sysctl_hung_task_timeout_secs = 120;
+unsigned long __read_mostly sysctl_hung_task_timeout_secs = 480;
unsigned long __read_mostly sysctl_hung_task_warnings = 10;
commit 429b022af41108f6942d72547592b1d30e9a51f0
Merge: 0cd418ddb1ee adee14b2e155
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Sep 10 08:35:40 2008 +0200
Merge commit 'v2.6.27-rc6' into core/rcu
commit 81faaae45701484bd7368336e02f2a846153b22f
Merge: f69feff72049 3c9339049df5
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Sep 10 08:20:51 2008 +0200
Merge branch 'x86/pebs' into x86/unify-cpu-detect
Conflicts:
arch/x86/Kconfig.cpu
include/asm-x86/ds.h
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --cc arch/x86/Kconfig.cpu
index ab77d409fee0,468ffc2df0e0..1b29d6a87563
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@@ -416,64 -416,20 +416,82 @@@ config X86_DEBUGCTLMS
def_bool y
depends on !(MK6 || MWINCHIPC6 || MWINCHIP2 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386)
+menuconfig PROCESSOR_SELECT
+ default y
+ bool "Supported processor vendors" if EMBEDDED
+ help
+ This lets you choose what x86 vendor support code your kernel
+ will include.
+
+config CPU_SUP_INTEL_32
+ default y
+ bool "Support Intel processors" if PROCESSOR_SELECT
+ depends on !64BIT
+ help
+ This enables extended support for Intel processors
+
+config CPU_SUP_INTEL_64
+ default y
+ bool "Support Intel processors" if PROCESSOR_SELECT
+ depends on 64BIT
+ help
+ This enables extended support for Intel processors
+
+config CPU_SUP_CYRIX_32
+ default y
+ bool "Support Cyrix processors" if PROCESSOR_SELECT
+ depends on !64BIT
+ help
+ This enables extended support for Cyrix processors
+
+config CPU_SUP_AMD
+ default y
+ bool "Support AMD processors" if PROCESSOR_SELECT
+ help
+ This enables extended support for AMD processors
+
+config CPU_SUP_CENTAUR_32
+ default y
+ bool "Support Centaur processors" if PROCESSOR_SELECT
+ depends on !64BIT
+ help
+ This enables extended support for Centaur processors
+
+config CPU_SUP_CENTAUR_64
+ default y
+ bool "Support Centaur processors" if PROCESSOR_SELECT
+ depends on 64BIT
+ help
+ This enables extended support for Centaur processors
+
+config CPU_SUP_TRANSMETA_32
+ default y
+ bool "Support Transmeta processors" if PROCESSOR_SELECT
+ depends on !64BIT
+ help
+ This enables extended support for Transmeta processors
+
+config CPU_SUP_UMC_32
+ default y
+ bool "Support UMC processors" if PROCESSOR_SELECT
+ depends on !64BIT
+ help
+ This enables extended support for UMC processors
++
+ config X86_DS
+ bool "Debug Store support"
+ default y
+ help
+ Add support for Debug Store.
+ This allows the kernel to provide a memory buffer to the hardware
+ to store various profiling and tracing events.
+
+ config X86_PTRACE_BTS
+ bool "ptrace interface to Branch Trace Store"
+ default y
+ depends on (X86_DS && X86_DEBUGCTLMSR)
+ help
+ Add a ptrace interface to allow collecting an execution trace
+ of the traced task.
+ This collects control flow changes in a (cyclic) buffer and allows
+ debuggers to fill in the gaps and show an execution trace of the debuggee.
diff --cc include/asm-x86/ds.h
index 6b27c686fa10,72c5a190bf48..c3c953a45b21
--- a/include/asm-x86/ds.h
+++ b/include/asm-x86/ds.h
@@@ -2,71 -2,237 +2,237 @@@
* Debug Store (DS) support
*
* This provides a low-level interface to the hardware's Debug Store
- * feature that is used for last branch recording (LBR) and
+ * feature that is used for branch trace store (BTS) and
* precise-event based sampling (PEBS).
*
- * Different architectures use a different DS layout/pointer size.
- * The below functions therefore work on a void*.
+ * It manages:
+ * - per-thread and per-cpu allocation of BTS and PEBS
+ * - buffer memory allocation (optional)
+ * - buffer overflow handling
+ * - buffer access
*
+ * It assumes:
+ * - get_task_struct on all parameter tasks
+ * - current is allowed to trace parameter tasks
*
- * Since there is no user for PEBS, yet, only LBR (or branch
- * trace store, BTS) is supported.
*
- *
- * Copyright (C) 2007 Intel Corporation.
- * Markus Metzger <markus.t.metzger@intel.com>, Dec 2007
+ * Copyright (C) 2007-2008 Intel Corporation.
+ * Markus Metzger <markus.t.metzger@intel.com>, 2007-2008
*/
-#ifndef _ASM_X86_DS_H
-#define _ASM_X86_DS_H
+#ifndef ASM_X86__DS_H
+#define ASM_X86__DS_H
+ #ifdef CONFIG_X86_DS
+
#include <linux/types.h>
#include <linux/init.h>
- struct cpuinfo_x86;
+ struct task_struct;
- /* a branch trace record entry
+ /*
+ * Request BTS or PEBS
+ *
+ * Due to alignement constraints, the actual buffer may be slightly
+ * smaller than the requested or provided buffer.
*
- * In order to unify the interface between various processor versions,
- * we use the below data structure for all processors.
+ * Returns 0 on success; -Eerrno otherwise
+ *
+ * task: the task to request recording for;
+ * NULL for per-cpu recording on the current cpu
+ * base: the base pointer for the (non-pageable) buffer;
+ * NULL if buffer allocation requested
+ * size: the size of the requested or provided buffer
+ * ovfl: pointer to a function to be called on buffer overflow;
+ * NULL if cyclic buffer requested
*/
- enum bts_qualifier {
- BTS_INVALID = 0,
- BTS_BRANCH,
- BTS_TASK_ARRIVES,
- BTS_TASK_DEPARTS
- };
+ typedef void (*ds_ovfl_callback_t)(struct task_struct *);
+ extern int ds_request_bts(struct task_struct *task, void *base, size_t size,
+ ds_ovfl_callback_t ovfl);
+ extern int ds_request_pebs(struct task_struct *task, void *base, size_t size,
+ ds_ovfl_callback_t ovfl);
+
+ /*
+ * Release BTS or PEBS resources
+ *
+ * Frees buffers allocated on ds_request.
+ *
+ * Returns 0 on success; -Eerrno otherwise
+ *
+ * task: the task to release resources for;
+ * NULL to release resources for the current cpu
+ */
+ extern int ds_release_bts(struct task_struct *task);
+ extern int ds_release_pebs(struct task_struct *task);
+
+ /*
+ * Return the (array) index of the write pointer.
+ * (assuming an array of BTS/PEBS records)
+ *
+ * Returns -Eerrno on error
+ *
+ * task: the task to access;
+ * NULL to access the current cpu
+ * pos (out): if not NULL, will hold the result
+ */
+ extern int ds_get_bts_index(struct task_struct *task, size_t *pos);
+ extern int ds_get_pebs_index(struct task_struct *task, size_t *pos);
+
+ /*
+ * Return the (array) index one record beyond the end of the array.
+ * (assuming an array of BTS/PEBS records)
+ *
+ * Returns -Eerrno on error
+ *
+ * task: the task to access;
+ * NULL to access the current cpu
+ * pos (out): if not NULL, will hold the result
+ */
+ extern int ds_get_bts_end(struct task_struct *task, size_t *pos);
+ extern int ds_get_pebs_end(struct task_struct *task, size_t *pos);
+
+ /*
+ * Provide a pointer to the BTS/PEBS record at parameter index.
+ * (assuming an array of BTS/PEBS records)
+ *
+ * The pointer points directly into the buffer. The user is
+ * responsible for copying the record.
+ *
+ * Returns the size of a single record on success; -Eerrno on error
+ *
+ * task: the task to access;
+ * NULL to access the current cpu
+ * index: the index of the requested record
+ * record (out): pointer to the requested record
+ */
+ extern int ds_access_bts(struct task_struct *task,
+ size_t index, const void **record);
+ extern int ds_access_pebs(struct task_struct *task,
+ size_t index, const void **record);
+
+ /*
+ * Write one or more BTS/PEBS records at the write pointer index and
+ * advance the write pointer.
+ *
+ * If size is not a multiple of the record size, trailing bytes are
+ * zeroed out.
+ *
+ * May result in one or more overflow notifications.
+ *
+ * If called during overflow handling, that is, with index >=
+ * interrupt threshold, the write will wrap around.
+ *
+ * An overflow notification is given if and when the interrupt
+ * threshold is reached during or after the write.
+ *
+ * Returns the number of bytes written or -Eerrno.
+ *
+ * task: the task to access;
+ * NULL to access the current cpu
+ * buffer: the buffer to write
+ * size: the size of the buffer
+ */
+ extern int ds_write_bts(struct task_struct *task,
+ const void *buffer, size_t size);
+ extern int ds_write_pebs(struct task_struct *task,
+ const void *buffer, size_t size);
+
+ /*
+ * Same as ds_write_bts/pebs, but omit ownership checks.
+ *
+ * This is needed to have some other task than the owner of the
+ * BTS/PEBS buffer or the parameter task itself write into the
+ * respective buffer.
+ */
+ extern int ds_unchecked_write_bts(struct task_struct *task,
+ const void *buffer, size_t size);
+ extern int ds_unchecked_write_pebs(struct task_struct *task,
+ const void *buffer, size_t size);
+
+ /*
+ * Reset the write pointer of the BTS/PEBS buffer.
+ *
+ * Returns 0 on success; -Eerrno on error
+ *
+ * task: the task to access;
+ * NULL to access the current cpu
+ */
+ extern int ds_reset_bts(struct task_struct *task);
+ extern int ds_reset_pebs(struct task_struct *task);
+
+ /*
+ * Clear the BTS/PEBS buffer and reset the write pointer.
+ * The entire buffer will be zeroed out.
+ *
+ * Returns 0 on success; -Eerrno on error
+ *
+ * task: the task to access;
+ * NULL to access the current cpu
+ */
+ extern int ds_clear_bts(struct task_struct *task);
+ extern int ds_clear_pebs(struct task_struct *task);
+
+ /*
+ * Provide the PEBS counter reset value.
+ *
+ * Returns 0 on success; -Eerrno on error
+ *
+ * task: the task to access;
+ * NULL to access the current cpu
+ * value (out): the counter reset value
+ */
+ extern int ds_get_pebs_reset(struct task_struct *task, u64 *value);
+
+ /*
+ * Set the PEBS counter reset value.
+ *
+ * Returns 0 on success; -Eerrno on error
+ *
+ * task: the task to access;
+ * NULL to access the current cpu
+ * value: the new counter reset value
+ */
+ extern int ds_set_pebs_reset(struct task_struct *task, u64 value);
+
+ /*
+ * Initialization
+ */
+ struct cpuinfo_x86;
+ extern void __cpuinit ds_init_intel(struct cpuinfo_x86 *);
+
+
- struct bts_struct {
- u64 qualifier;
- union {
- /* BTS_BRANCH */
- struct {
- u64 from_ip;
- u64 to_ip;
- } lbr;
- /* BTS_TASK_ARRIVES or
- BTS_TASK_DEPARTS */
- u64 jiffies;
- } variant;
+ /*
+ * The DS context - part of struct thread_struct.
+ */
+ struct ds_context {
+ /* pointer to the DS configuration; goes into MSR_IA32_DS_AREA */
+ unsigned char *ds;
+ /* the owner of the BTS and PEBS configuration, respectively */
+ struct task_struct *owner[2];
+ /* buffer overflow notification function for BTS and PEBS */
+ ds_ovfl_callback_t callback[2];
+ /* the original buffer address */
+ void *buffer[2];
+ /* the number of allocated pages for on-request allocated buffers */
+ unsigned int pages[2];
+ /* use count */
+ unsigned long count;
+ /* a pointer to the context location inside the thread_struct
+ * or the per_cpu context array */
+ struct ds_context **this;
+ /* a pointer to the task owning this context, or NULL, if the
+ * context is owned by a cpu */
+ struct task_struct *task;
};
- /* Overflow handling mechanisms */
- #define DS_O_SIGNAL 1 /* send overflow signal */
- #define DS_O_WRAP 2 /* wrap around */
-
- extern int ds_allocate(void **, size_t);
- extern int ds_free(void **);
- extern int ds_get_bts_size(void *);
- extern int ds_get_bts_end(void *);
- extern int ds_get_bts_index(void *);
- extern int ds_set_overflow(void *, int);
- extern int ds_get_overflow(void *);
- extern int ds_clear(void *);
- extern int ds_read_bts(void *, int, struct bts_struct *);
- extern int ds_write_bts(void *, const struct bts_struct *);
- extern unsigned long ds_debugctl_mask(void);
- extern void __cpuinit ds_init_intel(struct cpuinfo_x86 *c);
+ /* called by exit_thread() to free leftover contexts */
+ extern void ds_free(struct ds_context *context);
+
+ #else /* CONFIG_X86_DS */
+
+ #define ds_init_intel(config) do {} while (0)
+ #endif /* CONFIG_X86_DS */
-#endif /* _ASM_X86_DS_H */
+#endif /* ASM_X86__DS_H */
diff --cc include/asm-x86/ptrace-abi.h
index d0cf3344a586,3397817eded9..4298b8882a78
--- a/include/asm-x86/ptrace-abi.h
+++ b/include/asm-x86/ptrace-abi.h
@@@ -139,5 -140,6 +140,6 @@@ struct ptrace_bts_config
BTS records are read from oldest to newest.
Returns number of BTS records drained.
*/
+ #endif /* CONFIG_X86_PTRACE_BTS */
-#endif
+#endif /* ASM_X86__PTRACE_ABI_H */
commit 5df45515512436a808d3476a90e83f2efb022422
Author: Ingo Molnar <mingo@elte.hu>
Date: Sat Sep 6 23:55:40 2008 +0200
x86, tsc calibration: fix
my brown paperbag day ...
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 6dab90f68515..4847a9280505 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -319,7 +319,7 @@ static unsigned long quick_pit_calibrate(void)
/*
* Make sure we can rely on the second TSC timestamp:
*/
- if (!pit_expect_msb(--expect))
+ if (!pit_expect_msb(expect))
goto failed;
/*
commit 291c54ff764d12ecc9a916cb478a0bbb45c5990e
Merge: 49048622eae6 dfb512ec4834
Author: Ingo Molnar <mingo@elte.hu>
Date: Sat Sep 6 21:03:16 2008 +0200
Merge branch 'sched/cpuset' into sched/urgent
commit 7f79d852ed30a06eebf7497afe9334a726db3d40
Merge: aef745fca016 70bb08962ea9
Author: Ingo Molnar <mingo@elte.hu>
Date: Sat Sep 6 16:51:57 2008 +0200
Merge branch 'linus' into sched/devel
commit 77dd3b3bd23111040c504be6bd873a5ad09f02df
Merge: 916c7a855174 70bb08962ea9
Author: Ingo Molnar <mingo@elte.hu>
Date: Sat Sep 6 15:31:03 2008 +0200
Merge branch 'linus' into timers/ntp