Patches contributed by Eötvös Lorand University
commit 6236af82d8a989e150a02800c210eb61cb1e17be
Merge: e3ae0acf5924 8b7ef4ec5b1a
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Jul 8 12:24:29 2008 +0200
Merge branch 'x86/fixmap' into x86/devel
Conflicts:
arch/x86/mm/init_64.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
commit e3ae0acf59244ecf5b023ec99cef4b6b29d649bc
Merge: 4b62ac9a2b85 e7eb8726d0e1
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Jul 8 12:24:13 2008 +0200
Merge branch 'x86/uv' into x86/devel
commit d400524affeb84bdfc2b00cd561fbfb8c09dadd7
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Jun 18 14:51:57 2008 +0200
SGI UV: TLB shootdown using broadcast assist unit, fix
fix:
arch/x86/kernel/tlb_uv.c: In function ‘uv_table_bases_init':
arch/x86/kernel/tlb_uv.c:612: error: ‘bau_tabsp' undeclared (first use in this function)
arch/x86/kernel/tlb_uv.c:612: error: (Each undeclared identifier is reported only once
arch/x86/kernel/tlb_uv.c:612: error: for each function it appears in.)
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index 7bdbf67a2d79..b362913f0199 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -609,7 +609,7 @@ static struct bau_control * __init uv_table_bases_init(int blade, int node)
uv_bau_table_bases[blade] = bau_tabp;
- return bau_tabsp;
+ return bau_tabp;
}
/*
commit b4c286e6af24a116228c8c9f58b9a9eb5b7c000a
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Jun 18 14:28:19 2008 +0200
SGI UV: clean up arch/x86/kernel/tlb_uv.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index d8705e97e8d0..7bdbf67a2d79 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -11,19 +11,22 @@
#include <linux/kernel.h>
#include <asm/mmu_context.h>
-#include <asm/idle.h>
-#include <asm/genapic.h>
-#include <asm/uv/uv_hub.h>
#include <asm/uv/uv_mmrs.h>
+#include <asm/uv/uv_hub.h>
#include <asm/uv/uv_bau.h>
+#include <asm/genapic.h>
+#include <asm/idle.h>
#include <asm/tsc.h>
#include <mach_apic.h>
-static struct bau_control **uv_bau_table_bases __read_mostly;
-static int uv_bau_retry_limit __read_mostly;
-static int uv_nshift __read_mostly; /* position of pnode (which is nasid>>1) */
-static unsigned long uv_mmask __read_mostly;
+static struct bau_control **uv_bau_table_bases __read_mostly;
+static int uv_bau_retry_limit __read_mostly;
+
+/* position of pnode (which is nasid>>1): */
+static int uv_nshift __read_mostly;
+
+static unsigned long uv_mmask __read_mostly;
static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
static DEFINE_PER_CPU(struct bau_control, bau_control);
@@ -37,8 +40,8 @@ static DEFINE_PER_CPU(struct bau_control, bau_control);
* be sent (the hardware will only do one reply per message).
*/
static void uv_reply_to_message(int resource,
- struct bau_payload_queue_entry *msg,
- struct bau_msg_status *msp)
+ struct bau_payload_queue_entry *msg,
+ struct bau_msg_status *msp)
{
unsigned long dw;
@@ -55,11 +58,11 @@ static void uv_reply_to_message(int resource,
* Other cpu's may come here at the same time for this message.
*/
static void uv_bau_process_message(struct bau_payload_queue_entry *msg,
- int msg_slot, int sw_ack_slot)
+ int msg_slot, int sw_ack_slot)
{
- int cpu;
unsigned long this_cpu_mask;
struct bau_msg_status *msp;
+ int cpu;
msp = __get_cpu_var(bau_control).msg_statuses + msg_slot;
cpu = uv_blade_processor_id();
@@ -96,11 +99,11 @@ static void uv_bau_process_message(struct bau_payload_queue_entry *msg,
*/
static int uv_examine_destination(struct bau_control *bau_tablesp, int sender)
{
- int i;
- int j;
- int count = 0;
struct bau_payload_queue_entry *msg;
struct bau_msg_status *msp;
+ int count = 0;
+ int i;
+ int j;
for (msg = bau_tablesp->va_queue_first, i = 0; i < DEST_Q_SIZE;
msg++, i++) {
@@ -111,7 +114,7 @@ static int uv_examine_destination(struct bau_control *bau_tablesp, int sender)
i, msg->address, msg->acknowledge_count,
msg->number_of_cpus);
for (j = 0; j < msg->number_of_cpus; j++) {
- if (!((long)1 << j & msp-> seen_by.bits)) {
+ if (!((1L << j) & msp->seen_by.bits)) {
count++;
printk("%d ", j);
}
@@ -135,8 +138,7 @@ static int uv_examine_destinations(struct bau_target_nodemask *distribution)
int count = 0;
sender = smp_processor_id();
- for (i = 0; i < (sizeof(struct bau_target_nodemask) * BITSPERBYTE);
- i++) {
+ for (i = 0; i < sizeof(struct bau_target_nodemask) * BITSPERBYTE; i++) {
if (!bau_node_isset(i, distribution))
continue;
count += uv_examine_destination(uv_bau_table_bases[i], sender);
@@ -217,11 +219,11 @@ int uv_flush_send_and_wait(int cpu, int this_blade, struct bau_desc *bau_desc,
{
int completion_status = 0;
int right_shift;
- int bit;
- int blade;
int tries = 0;
- unsigned long index;
+ int blade;
+ int bit;
unsigned long mmr_offset;
+ unsigned long index;
cycles_t time1;
cycles_t time2;
@@ -294,7 +296,7 @@ int uv_flush_send_and_wait(int cpu, int this_blade, struct bau_desc *bau_desc,
* Returns 0 if some remote flushing remains to be done.
*/
int uv_flush_tlb_others(cpumask_t *cpumaskp, struct mm_struct *mm,
- unsigned long va)
+ unsigned long va)
{
int i;
int bit;
@@ -356,12 +358,12 @@ int uv_flush_tlb_others(cpumask_t *cpumaskp, struct mm_struct *mm,
*/
void uv_bau_message_interrupt(struct pt_regs *regs)
{
- struct bau_payload_queue_entry *pqp;
- struct bau_payload_queue_entry *msg;
struct bau_payload_queue_entry *va_queue_first;
struct bau_payload_queue_entry *va_queue_last;
+ struct bau_payload_queue_entry *msg;
struct pt_regs *old_regs = set_irq_regs(regs);
- cycles_t time1, time2;
+ cycles_t time1;
+ cycles_t time2;
int msg_slot;
int sw_ack_slot;
int fw;
@@ -376,13 +378,14 @@ void uv_bau_message_interrupt(struct pt_regs *regs)
local_pnode = uv_blade_to_pnode(uv_numa_blade_id());
- pqp = va_queue_first = __get_cpu_var(bau_control).va_queue_first;
+ va_queue_first = __get_cpu_var(bau_control).va_queue_first;
va_queue_last = __get_cpu_var(bau_control).va_queue_last;
+
msg = __get_cpu_var(bau_control).bau_msg_head;
while (msg->sw_ack_vector) {
count++;
fw = msg->sw_ack_vector;
- msg_slot = msg - pqp;
+ msg_slot = msg - va_queue_first;
sw_ack_slot = ffs(fw) - 1;
uv_bau_process_message(msg, msg_slot, sw_ack_slot);
@@ -484,7 +487,7 @@ static int uv_ptc_seq_show(struct seq_file *file, void *data)
* >0: retry limit
*/
static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user,
- size_t count, loff_t *data)
+ size_t count, loff_t *data)
{
long newmode;
char optstr[64];
@@ -587,42 +590,48 @@ static struct bau_control * __init uv_table_bases_init(int blade, int node)
bau_tabp =
kmalloc_node(sizeof(struct bau_control), GFP_KERNEL, node);
BUG_ON(!bau_tabp);
+
bau_tabp->msg_statuses =
kmalloc_node(sizeof(struct bau_msg_status) *
DEST_Q_SIZE, GFP_KERNEL, node);
BUG_ON(!bau_tabp->msg_statuses);
+
for (i = 0, msp = bau_tabp->msg_statuses; i < DEST_Q_SIZE; i++, msp++)
bau_cpubits_clear(&msp->seen_by, (int)
uv_blade_nr_possible_cpus(blade));
+
bau_tabp->watching =
kmalloc_node(sizeof(int) * DEST_NUM_RESOURCES, GFP_KERNEL, node);
BUG_ON(!bau_tabp->watching);
- for (i = 0, ip = bau_tabp->watching; i < DEST_Q_SIZE; i++, ip++) {
+
+ for (i = 0, ip = bau_tabp->watching; i < DEST_Q_SIZE; i++, ip++)
*ip = 0;
- }
+
uv_bau_table_bases[blade] = bau_tabp;
+
return bau_tabsp;
}
/*
* finish the initialization of the per-blade control structures
*/
-static void __init uv_table_bases_finish(int blade, int node, int cur_cpu,
- struct bau_control *bau_tablesp,
- struct bau_desc *adp)
+static void __init
+uv_table_bases_finish(int blade, int node, int cur_cpu,
+ struct bau_control *bau_tablesp,
+ struct bau_desc *adp)
{
- int i;
struct bau_control *bcp;
+ int i;
- for (i = cur_cpu; i < (cur_cpu + uv_blade_nr_possible_cpus(blade));
- i++) {
+ for (i = cur_cpu; i < cur_cpu + uv_blade_nr_possible_cpus(blade); i++) {
bcp = (struct bau_control *)&per_cpu(bau_control, i);
- bcp->bau_msg_head = bau_tablesp->va_queue_first;
- bcp->va_queue_first = bau_tablesp->va_queue_first;
- bcp->va_queue_last = bau_tablesp->va_queue_last;
- bcp->watching = bau_tablesp->watching;
- bcp->msg_statuses = bau_tablesp->msg_statuses;
- bcp->descriptor_base = adp;
+
+ bcp->bau_msg_head = bau_tablesp->va_queue_first;
+ bcp->va_queue_first = bau_tablesp->va_queue_first;
+ bcp->va_queue_last = bau_tablesp->va_queue_last;
+ bcp->watching = bau_tablesp->watching;
+ bcp->msg_statuses = bau_tablesp->msg_statuses;
+ bcp->descriptor_base = adp;
}
}
@@ -643,14 +652,18 @@ uv_activation_descriptor_init(int node, int pnode)
adp = (struct bau_desc *)
kmalloc_node(16384, GFP_KERNEL, node);
BUG_ON(!adp);
+
pa = __pa((unsigned long)adp);
n = pa >> uv_nshift;
m = pa & uv_mmask;
+
mmr_image = uv_read_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE);
- if (mmr_image)
+ if (mmr_image) {
uv_write_global_mmr64(pnode, (unsigned long)
UVH_LB_BAU_SB_DESCRIPTOR_BASE,
(n << UV_DESC_BASE_PNODE_SHIFT | m));
+ }
+
for (i = 0, ad2 = adp; i < UV_ACTIVATION_DESCRIPTOR_SIZE; i++, ad2++) {
memset(ad2, 0, sizeof(struct bau_desc));
ad2->header.sw_ack_flag = 1;
@@ -669,16 +682,17 @@ uv_activation_descriptor_init(int node, int pnode)
/*
* initialize the destination side's receiving buffers
*/
-static struct bau_payload_queue_entry * __init uv_payload_queue_init(int node,
- int pnode, struct bau_control *bau_tablesp)
+static struct bau_payload_queue_entry * __init
+uv_payload_queue_init(int node, int pnode, struct bau_control *bau_tablesp)
{
- char *cp;
struct bau_payload_queue_entry *pqp;
+ char *cp;
pqp = (struct bau_payload_queue_entry *) kmalloc_node(
(DEST_Q_SIZE + 1) * sizeof(struct bau_payload_queue_entry),
GFP_KERNEL, node);
BUG_ON(!pqp);
+
cp = (char *)pqp + 31;
pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5);
bau_tablesp->va_queue_first = pqp;
@@ -694,6 +708,7 @@ static struct bau_payload_queue_entry * __init uv_payload_queue_init(int node,
(unsigned long)
uv_physnodeaddr(bau_tablesp->va_queue_last));
memset(pqp, 0, sizeof(struct bau_payload_queue_entry) * DEST_Q_SIZE);
+
return pqp;
}
@@ -756,6 +771,7 @@ static int __init uv_bau_init(void)
uv_bau_table_bases = (struct bau_control **)
kmalloc(nblades * sizeof(struct bau_control *), GFP_KERNEL);
BUG_ON(!uv_bau_table_bases);
+
last_blade = -1;
for_each_online_node(node) {
blade = uv_node_to_blade_id(node);
@@ -767,6 +783,7 @@ static int __init uv_bau_init(void)
}
set_intr_gate(UV_BAU_MESSAGE, uv_bau_message_intr1);
uv_enable_timeouts();
+
return 0;
}
__initcall(uv_bau_init);
commit dc163a41ffba22a6ef70b51e7ddf68aa13b4b414
Author: Ingo Molnar <mingo@elte.hu>
Date: Wed Jun 18 14:15:43 2008 +0200
SGI UV: TLB shootdown using broadcast assist unit
TLB shootdown for SGI UV.
v5: 6/12 corrections/improvements per Ingo's second review
Signed-off-by: Cliff Wickman <cpw@sgi.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index f7bc6a6fbe49..d8705e97e8d0 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -25,15 +25,8 @@ static int uv_bau_retry_limit __read_mostly;
static int uv_nshift __read_mostly; /* position of pnode (which is nasid>>1) */
static unsigned long uv_mmask __read_mostly;
-char *status_table[] = {
- "IDLE",
- "ACTIVE",
- "DESTINATION TIMEOUT",
- "SOURCE TIMEOUT"
-};
-
-DEFINE_PER_CPU(struct ptc_stats, ptcstats);
-DEFINE_PER_CPU(struct bau_control, bau_control);
+static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
+static DEFINE_PER_CPU(struct bau_control, bau_control);
/*
* Free a software acknowledge hardware resource by clearing its Pending
@@ -55,7 +48,6 @@ static void uv_reply_to_message(int resource,
if (msp)
msp->seen_by.bits = 0;
uv_write_local_mmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, dw);
- return;
}
/*
@@ -73,7 +65,7 @@ static void uv_bau_process_message(struct bau_payload_queue_entry *msg,
cpu = uv_blade_processor_id();
msg->number_of_cpus =
uv_blade_nr_online_cpus(uv_node_to_blade_id(numa_node_id()));
- this_cpu_mask = (unsigned long)1 << cpu;
+ this_cpu_mask = 1UL << cpu;
if (msp->seen_by.bits & this_cpu_mask)
return;
atomic_or_long(&msp->seen_by.bits, this_cpu_mask);
@@ -94,53 +86,60 @@ static void uv_bau_process_message(struct bau_payload_queue_entry *msg,
atomic_inc_short(&msg->acknowledge_count);
if (msg->number_of_cpus == msg->acknowledge_count)
uv_reply_to_message(sw_ack_slot, msg, msp);
- return;
}
/*
- * Examine the payload queue on all the distribution nodes to see
+ * Examine the payload queue on one distribution node to see
* which messages have not been seen, and which cpu(s) have not seen them.
*
* Returns the number of cpu's that have not responded.
*/
-static int uv_examine_destinations(struct bau_target_nodemask *distribution)
+static int uv_examine_destination(struct bau_control *bau_tablesp, int sender)
{
- int sender;
int i;
int j;
- int k;
int count = 0;
- struct bau_control *bau_tablesp;
struct bau_payload_queue_entry *msg;
struct bau_msg_status *msp;
+ for (msg = bau_tablesp->va_queue_first, i = 0; i < DEST_Q_SIZE;
+ msg++, i++) {
+ if ((msg->sending_cpu == sender) && (!msg->replied_to)) {
+ msp = bau_tablesp->msg_statuses + i;
+ printk(KERN_DEBUG
+ "blade %d: address:%#lx %d of %d, not cpu(s): ",
+ i, msg->address, msg->acknowledge_count,
+ msg->number_of_cpus);
+ for (j = 0; j < msg->number_of_cpus; j++) {
+ if (!((long)1 << j & msp-> seen_by.bits)) {
+ count++;
+ printk("%d ", j);
+ }
+ }
+ printk("\n");
+ }
+ }
+ return count;
+}
+
+/*
+ * Examine the payload queue on all the distribution nodes to see
+ * which messages have not been seen, and which cpu(s) have not seen them.
+ *
+ * Returns the number of cpu's that have not responded.
+ */
+static int uv_examine_destinations(struct bau_target_nodemask *distribution)
+{
+ int sender;
+ int i;
+ int count = 0;
+
sender = smp_processor_id();
for (i = 0; i < (sizeof(struct bau_target_nodemask) * BITSPERBYTE);
i++) {
if (!bau_node_isset(i, distribution))
continue;
- bau_tablesp = uv_bau_table_bases[i];
- for (msg = bau_tablesp->va_queue_first, j = 0;
- j < DESTINATION_PAYLOAD_QUEUE_SIZE; msg++, j++) {
- if ((msg->sending_cpu == sender) &&
- (!msg->replied_to)) {
- msp = bau_tablesp->msg_statuses + j;
- printk(KERN_DEBUG
- "blade %d: address:%#lx %d of %d, not cpu(s): ",
- i, msg->address,
- msg->acknowledge_count,
- msg->number_of_cpus);
- for (k = 0; k < msg->number_of_cpus;
- k++) {
- if (!((long)1 << k & msp->
- seen_by.bits)) {
- count++;
- printk("%d ", k);
- }
- }
- printk("\n");
- }
- }
+ count += uv_examine_destination(uv_bau_table_bases[i], sender);
}
return count;
}
@@ -150,7 +149,7 @@ static int uv_examine_destinations(struct bau_target_nodemask *distribution)
*
* return COMPLETE, RETRY or GIVEUP
*/
-static int uv_wait_completion(struct bau_activation_descriptor *bau_desc,
+static int uv_wait_completion(struct bau_desc *bau_desc,
unsigned long mmr_offset, int right_shift)
{
int exams = 0;
@@ -213,8 +212,8 @@ static int uv_wait_completion(struct bau_activation_descriptor *bau_desc,
* Returns 0 if some remote flushing remains to be done. The mask is left
* unchanged.
*/
-int uv_flush_send_and_wait(int cpu, int this_blade,
- struct bau_activation_descriptor *bau_desc, cpumask_t *cpumaskp)
+int uv_flush_send_and_wait(int cpu, int this_blade, struct bau_desc *bau_desc,
+ cpumask_t *cpumaskp)
{
int completion_status = 0;
int right_shift;
@@ -237,8 +236,8 @@ int uv_flush_send_and_wait(int cpu, int this_blade,
time1 = get_cycles();
do {
tries++;
- index = ((unsigned long)
- 1 << UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT) | cpu;
+ index = (1UL << UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT) |
+ cpu;
uv_write_local_mmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index);
completion_status = uv_wait_completion(bau_desc, mmr_offset,
right_shift);
@@ -303,7 +302,7 @@ int uv_flush_tlb_others(cpumask_t *cpumaskp, struct mm_struct *mm,
int cpu;
int this_blade;
int locals = 0;
- struct bau_activation_descriptor *bau_desc;
+ struct bau_desc *bau_desc;
cpu = uv_blade_processor_id();
this_blade = uv_numa_blade_id();
@@ -315,8 +314,7 @@ int uv_flush_tlb_others(cpumask_t *cpumaskp, struct mm_struct *mm,
i = 0;
for_each_cpu_mask(bit, *cpumaskp) {
blade = uv_cpu_to_blade_id(bit);
- if (blade > (UV_DISTRIBUTION_SIZE - 1))
- BUG();
+ BUG_ON(blade > (UV_DISTRIBUTION_SIZE - 1));
if (blade == this_blade) {
locals++;
continue;
@@ -360,6 +358,8 @@ void uv_bau_message_interrupt(struct pt_regs *regs)
{
struct bau_payload_queue_entry *pqp;
struct bau_payload_queue_entry *msg;
+ struct bau_payload_queue_entry *va_queue_first;
+ struct bau_payload_queue_entry *va_queue_last;
struct pt_regs *old_regs = set_irq_regs(regs);
cycles_t time1, time2;
int msg_slot;
@@ -376,7 +376,8 @@ void uv_bau_message_interrupt(struct pt_regs *regs)
local_pnode = uv_blade_to_pnode(uv_numa_blade_id());
- pqp = __get_cpu_var(bau_control).va_queue_first;
+ pqp = va_queue_first = __get_cpu_var(bau_control).va_queue_first;
+ va_queue_last = __get_cpu_var(bau_control).va_queue_last;
msg = __get_cpu_var(bau_control).bau_msg_head;
while (msg->sw_ack_vector) {
count++;
@@ -387,8 +388,8 @@ void uv_bau_message_interrupt(struct pt_regs *regs)
uv_bau_process_message(msg, msg_slot, sw_ack_slot);
msg++;
- if (msg > __get_cpu_var(bau_control).va_queue_last)
- msg = __get_cpu_var(bau_control).va_queue_first;
+ if (msg > va_queue_last)
+ msg = va_queue_first;
__get_cpu_var(bau_control).bau_msg_head = msg;
}
if (!count)
@@ -401,7 +402,6 @@ void uv_bau_message_interrupt(struct pt_regs *regs)
irq_exit();
set_irq_regs(old_regs);
- return;
}
static void uv_enable_timeouts(void)
@@ -423,7 +423,6 @@ static void uv_enable_timeouts(void)
pnode = uv_blade_to_pnode(blade);
cur_cpu += uv_blade_nr_possible_cpus(i);
}
- return;
}
static void *uv_ptc_seq_start(struct seq_file *file, loff_t *offset)
@@ -535,10 +534,10 @@ static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user,
}
static const struct seq_operations uv_ptc_seq_ops = {
- .start = uv_ptc_seq_start,
- .next = uv_ptc_seq_next,
- .stop = uv_ptc_seq_stop,
- .show = uv_ptc_seq_show
+ .start = uv_ptc_seq_start,
+ .next = uv_ptc_seq_next,
+ .stop = uv_ptc_seq_stop,
+ .show = uv_ptc_seq_show
};
static int uv_ptc_proc_open(struct inode *inode, struct file *file)
@@ -568,6 +567,7 @@ static int __init uv_ptc_init(void)
if (!proc_uv_ptc) {
printk(KERN_ERR "unable to create %s proc entry\n",
UV_PTC_BASENAME);
+ remove_proc_entry("sgi_uv", NULL);
return -EINVAL;
}
proc_uv_ptc->proc_fops = &proc_uv_ptc_operations;
@@ -582,33 +582,26 @@ static struct bau_control * __init uv_table_bases_init(int blade, int node)
int i;
int *ip;
struct bau_msg_status *msp;
- struct bau_control *bau_tablesp;
+ struct bau_control *bau_tabp;
- bau_tablesp =
+ bau_tabp =
kmalloc_node(sizeof(struct bau_control), GFP_KERNEL, node);
- if (!bau_tablesp)
- BUG();
- bau_tablesp->msg_statuses =
+ BUG_ON(!bau_tabp);
+ bau_tabp->msg_statuses =
kmalloc_node(sizeof(struct bau_msg_status) *
- DESTINATION_PAYLOAD_QUEUE_SIZE, GFP_KERNEL, node);
- if (!bau_tablesp->msg_statuses)
- BUG();
- for (i = 0, msp = bau_tablesp->msg_statuses;
- i < DESTINATION_PAYLOAD_QUEUE_SIZE; i++, msp++) {
+ DEST_Q_SIZE, GFP_KERNEL, node);
+ BUG_ON(!bau_tabp->msg_statuses);
+ for (i = 0, msp = bau_tabp->msg_statuses; i < DEST_Q_SIZE; i++, msp++)
bau_cpubits_clear(&msp->seen_by, (int)
uv_blade_nr_possible_cpus(blade));
- }
- bau_tablesp->watching =
- kmalloc_node(sizeof(int) * DESTINATION_NUM_RESOURCES,
- GFP_KERNEL, node);
- if (!bau_tablesp->watching)
- BUG();
- for (i = 0, ip = bau_tablesp->watching;
- i < DESTINATION_PAYLOAD_QUEUE_SIZE; i++, ip++) {
+ bau_tabp->watching =
+ kmalloc_node(sizeof(int) * DEST_NUM_RESOURCES, GFP_KERNEL, node);
+ BUG_ON(!bau_tabp->watching);
+ for (i = 0, ip = bau_tabp->watching; i < DEST_Q_SIZE; i++, ip++) {
*ip = 0;
}
- uv_bau_table_bases[blade] = bau_tablesp;
- return bau_tablesp;
+ uv_bau_table_bases[blade] = bau_tabp;
+ return bau_tabsp;
}
/*
@@ -616,7 +609,7 @@ static struct bau_control * __init uv_table_bases_init(int blade, int node)
*/
static void __init uv_table_bases_finish(int blade, int node, int cur_cpu,
struct bau_control *bau_tablesp,
- struct bau_activation_descriptor *adp)
+ struct bau_desc *adp)
{
int i;
struct bau_control *bcp;
@@ -636,7 +629,7 @@ static void __init uv_table_bases_finish(int blade, int node, int cur_cpu,
/*
* initialize the sending side's sending buffers
*/
-static struct bau_activation_descriptor * __init
+static struct bau_desc * __init
uv_activation_descriptor_init(int node, int pnode)
{
int i;
@@ -644,13 +637,12 @@ uv_activation_descriptor_init(int node, int pnode)
unsigned long m;
unsigned long n;
unsigned long mmr_image;
- struct bau_activation_descriptor *adp;
- struct bau_activation_descriptor *ad2;
+ struct bau_desc *adp;
+ struct bau_desc *ad2;
- adp = (struct bau_activation_descriptor *)
+ adp = (struct bau_desc *)
kmalloc_node(16384, GFP_KERNEL, node);
- if (!adp)
- BUG();
+ BUG_ON(!adp);
pa = __pa((unsigned long)adp);
n = pa >> uv_nshift;
m = pa & uv_mmask;
@@ -660,7 +652,7 @@ uv_activation_descriptor_init(int node, int pnode)
UVH_LB_BAU_SB_DESCRIPTOR_BASE,
(n << UV_DESC_BASE_PNODE_SHIFT | m));
for (i = 0, ad2 = adp; i < UV_ACTIVATION_DESCRIPTOR_SIZE; i++, ad2++) {
- memset(ad2, 0, sizeof(struct bau_activation_descriptor));
+ memset(ad2, 0, sizeof(struct bau_desc));
ad2->header.sw_ack_flag = 1;
ad2->header.base_dest_nodeid =
uv_blade_to_pnode(uv_cpu_to_blade_id(0));
@@ -683,12 +675,10 @@ static struct bau_payload_queue_entry * __init uv_payload_queue_init(int node,
char *cp;
struct bau_payload_queue_entry *pqp;
- pqp = (struct bau_payload_queue_entry *)
- kmalloc_node((DESTINATION_PAYLOAD_QUEUE_SIZE + 1) *
- sizeof(struct bau_payload_queue_entry),
- GFP_KERNEL, node);
- if (!pqp)
- BUG();
+ pqp = (struct bau_payload_queue_entry *) kmalloc_node(
+ (DEST_Q_SIZE + 1) * sizeof(struct bau_payload_queue_entry),
+ GFP_KERNEL, node);
+ BUG_ON(!pqp);
cp = (char *)pqp + 31;
pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5);
bau_tablesp->va_queue_first = pqp;
@@ -699,13 +689,11 @@ static struct bau_payload_queue_entry * __init uv_payload_queue_init(int node,
uv_physnodeaddr(pqp));
uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL,
uv_physnodeaddr(pqp));
- bau_tablesp->va_queue_last =
- pqp + (DESTINATION_PAYLOAD_QUEUE_SIZE - 1);
+ bau_tablesp->va_queue_last = pqp + (DEST_Q_SIZE - 1);
uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST,
(unsigned long)
uv_physnodeaddr(bau_tablesp->va_queue_last));
- memset(pqp, 0, sizeof(struct bau_payload_queue_entry) *
- DESTINATION_PAYLOAD_QUEUE_SIZE);
+ memset(pqp, 0, sizeof(struct bau_payload_queue_entry) * DEST_Q_SIZE);
return pqp;
}
@@ -717,7 +705,7 @@ static int __init uv_init_blade(int blade, int node, int cur_cpu)
int pnode;
unsigned long pa;
unsigned long apicid;
- struct bau_activation_descriptor *adp;
+ struct bau_desc *adp;
struct bau_payload_queue_entry *pqp;
struct bau_control *bau_tablesp;
@@ -755,7 +743,7 @@ static int __init uv_bau_init(void)
uv_bau_retry_limit = 1;
uv_nshift = uv_hub_info->n_val;
- uv_mmask = ((unsigned long)1 << uv_hub_info->n_val) - 1;
+ uv_mmask = (1UL << uv_hub_info->n_val) - 1;
nblades = 0;
last_blade = -1;
for_each_online_node(node) {
@@ -767,8 +755,7 @@ static int __init uv_bau_init(void)
}
uv_bau_table_bases = (struct bau_control **)
kmalloc(nblades * sizeof(struct bau_control *), GFP_KERNEL);
- if (!uv_bau_table_bases)
- BUG();
+ BUG_ON(!uv_bau_table_bases);
last_blade = -1;
for_each_online_node(node) {
blade = uv_node_to_blade_id(node);
diff --git a/include/asm-x86/uv/uv_bau.h b/include/asm-x86/uv/uv_bau.h
index e52fec822667..91ac0dfb7588 100644
--- a/include/asm-x86/uv/uv_bau.h
+++ b/include/asm-x86/uv/uv_bau.h
@@ -54,25 +54,25 @@
/*
* bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1
*/
-#define DESC_STATUS_IDLE 0
-#define DESC_STATUS_ACTIVE 1
-#define DESC_STATUS_DESTINATION_TIMEOUT 2
-#define DESC_STATUS_SOURCE_TIMEOUT 3
+#define DESC_STATUS_IDLE 0
+#define DESC_STATUS_ACTIVE 1
+#define DESC_STATUS_DESTINATION_TIMEOUT 2
+#define DESC_STATUS_SOURCE_TIMEOUT 3
/*
* source side threshholds at which message retries print a warning
*/
-#define SOURCE_TIMEOUT_LIMIT 20
-#define DESTINATION_TIMEOUT_LIMIT 20
+#define SOURCE_TIMEOUT_LIMIT 20
+#define DESTINATION_TIMEOUT_LIMIT 20
/*
* number of entries in the destination side payload queue
*/
-#define DESTINATION_PAYLOAD_QUEUE_SIZE 17
+#define DEST_Q_SIZE 17
/*
* number of destination side software ack resources
*/
-#define DESTINATION_NUM_RESOURCES 8
+#define DEST_NUM_RESOURCES 8
#define MAX_CPUS_PER_NODE 32
/*
* completion statuses for sending a TLB flush message
@@ -197,10 +197,11 @@ struct bau_msg_header {
};
/*
+ * The activation descriptor:
* The format of the message to send, plus all accompanying control
* Should be 64 bytes
*/
-struct bau_activation_descriptor {
+struct bau_desc {
struct bau_target_nodemask distribution;
/*
* message template, consisting of header and payload:
@@ -281,7 +282,7 @@ struct bau_sw_ack_status {
* one on every node and per-cpu; to locate the software tables
*/
struct bau_control {
- struct bau_activation_descriptor *descriptor_base;
+ struct bau_desc *descriptor_base;
struct bau_payload_queue_entry *bau_msg_head;
struct bau_payload_queue_entry *va_queue_first;
struct bau_payload_queue_entry *va_queue_last;
commit d98b940ab29a245de84a1c138b866dcc29217601
Merge: cbd6712406a3 1b40a895df6c
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Jul 8 12:23:00 2008 +0200
Merge branch 'linus' into x86/irq
commit 4b62ac9a2b859f932afd5625362c927111b7dd9b
Merge: 2b4fa851b2f0 8700600a7485
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Jul 8 12:17:08 2008 +0200
Merge branch 'x86/nmi' into x86/devel
Conflicts:
arch/x86/kernel/nmi.c
arch/x86/kernel/nmi_32.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --cc arch/x86/kernel/nmi.c
index d62f3b66b529,fd680c73ba77..9ebf71323c9a
--- a/arch/x86/kernel/nmi.c
+++ b/arch/x86/kernel/nmi.c
@@@ -17,15 -20,16 +20,20 @@@
#include <linux/module.h>
#include <linux/sysdev.h>
#include <linux/sysctl.h>
+ #include <linux/percpu.h>
#include <linux/kprobes.h>
#include <linux/cpumask.h>
+ #include <linux/kernel_stat.h>
#include <linux/kdebug.h>
+ #include <linux/smp.h>
+#include <asm/i8259.h>
+#include <asm/io_apic.h>
+#include <asm/smp.h>
+#include <asm/nmi.h>
#include <asm/proto.h>
+ #include <asm/timer.h>
+
#include <asm/mce.h>
#include <mach_traps.h>
@@@ -134,10 -175,11 +179,9 @@@ int __init check_nmi_watchdog(void
kfree(prev_nmi_count);
return 0;
-
error:
-#ifdef CONFIG_X86_32
- timer_ack = !cpu_has_tsc;
-#endif
+ if (nmi_watchdog == NMI_IO_APIC && !timer_through_8259)
+ disable_8259A_irq(0);
-
return -1;
}
diff --cc include/asm-x86/nmi.h
index 05449ef830a7,470bb4aacb75..f0e435dd38fb
--- a/include/asm-x86/nmi.h
+++ b/include/asm-x86/nmi.h
@@@ -15,14 -15,33 +15,12 @@@
*/
int do_nmi_callback(struct pt_regs *regs, int cpu);
-#ifdef CONFIG_PM
-
-/** Replace the PM callback routine for NMI. */
-struct pm_dev *set_nmi_pm_callback(pm_callback callback);
-
-/** Unset the PM callback routine back to the default. */
-void unset_nmi_pm_callback(struct pm_dev *dev);
-
-#else
-
-static inline struct pm_dev *set_nmi_pm_callback(pm_callback callback)
-{
- return 0;
-}
-
-static inline void unset_nmi_pm_callback(struct pm_dev *dev)
-{
-}
-
-#endif /* CONFIG_PM */
-
#ifdef CONFIG_X86_64
extern void default_do_nmi(struct pt_regs *);
- extern void die_nmi(char *str, struct pt_regs *regs, int do_panic);
- extern void nmi_watchdog_default(void);
- #else
- #define nmi_watchdog_default() do {} while (0)
#endif
+ extern void die_nmi(char *str, struct pt_regs *regs, int do_panic);
+ extern void nmi_watchdog_default(void);
extern int check_nmi_watchdog(void);
extern int nmi_watchdog_enabled;
extern int avail_to_resrv_perfctr_nmi_bit(unsigned int);
commit 2b4fa851b2f06fdb04cac808b57324f5e51e1578
Merge: 3de352bbd86f 46f68e1c6b04
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Jul 8 11:59:23 2008 +0200
Merge branch 'x86/numa' into x86/devel
Conflicts:
arch/x86/Kconfig
arch/x86/kernel/e820.c
arch/x86/kernel/efi_64.c
arch/x86/kernel/mpparse.c
arch/x86/kernel/setup.c
arch/x86/kernel/setup_32.c
arch/x86/mm/init_64.c
include/asm-x86/proto.h
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --cc arch/x86/kernel/apic_64.c
index d7406aa1c985,4fd21f7d698c..e494809fc508
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@@ -1071,13 -1087,10 +1068,13 @@@ void __cpuinit generic_processor_info(i
*/
cpu = 0;
}
+ if (apicid > max_physical_apicid)
+ max_physical_apicid = apicid;
+
/* are we being called early in kernel startup? */
- if (x86_cpu_to_apicid_early_ptr) {
- u16 *cpu_to_apicid = x86_cpu_to_apicid_early_ptr;
- u16 *bios_cpu_apicid = x86_bios_cpu_apicid_early_ptr;
+ if (early_per_cpu_ptr(x86_cpu_to_apicid)) {
+ u16 *cpu_to_apicid = early_per_cpu_ptr(x86_cpu_to_apicid);
+ u16 *bios_cpu_apicid = early_per_cpu_ptr(x86_bios_cpu_apicid);
cpu_to_apicid[cpu] = apicid;
bios_cpu_apicid[cpu] = apicid;
diff --cc arch/x86/kernel/nmi_64.c
index 0060e44e8989,2861b9408ac9..d62f3b66b529
--- a/arch/x86/kernel/nmi_64.c
+++ b/arch/x86/kernel/nmi_64.c
@@@ -90,9 -88,9 +90,9 @@@ int __init check_nmi_watchdog(void
if (!atomic_read(&nmi_active))
return 0;
- prev_nmi_count = kmalloc(NR_CPUS * sizeof(int), GFP_KERNEL);
+ prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(int), GFP_KERNEL);
if (!prev_nmi_count)
- return -1;
+ goto error;
printk(KERN_INFO "Testing NMI watchdog ... ");
diff --cc arch/x86/kernel/setup.c
index 5b0de38cde48,d4eaa4eb481d..ebb0a2bcdc08
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@@ -17,12 -17,8 +17,9 @@@ unsigned int num_processors
unsigned disabled_cpus __cpuinitdata;
/* Processor that is doing the boot up */
unsigned int boot_cpu_physical_apicid = -1U;
+unsigned int max_physical_apicid;
EXPORT_SYMBOL(boot_cpu_physical_apicid);
- DEFINE_PER_CPU(u16, x86_cpu_to_apicid) = BAD_APICID;
- EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid);
-
/* Bitmask of physically existing CPUs */
physid_mask_t phys_cpu_present_map;
#endif
@@@ -139,27 -206,175 +207,200 @@@ void __init setup_per_cpu_areas(void
#endif
+void __init parse_setup_data(void)
+{
+ struct setup_data *data;
+ u64 pa_data;
+
+ if (boot_params.hdr.version < 0x0209)
+ return;
+ pa_data = boot_params.hdr.setup_data;
+ while (pa_data) {
+ data = early_ioremap(pa_data, PAGE_SIZE);
+ switch (data->type) {
+ case SETUP_E820_EXT:
+ parse_e820_ext(data, pa_data);
+ break;
+ default:
+ break;
+ }
+#ifndef CONFIG_DEBUG_BOOT_PARAMS
+ free_early(pa_data, pa_data+sizeof(*data)+data->len);
+#endif
+ pa_data = data->next;
+ early_iounmap(data, PAGE_SIZE);
+ }
+}
++
+ #ifdef X86_64_NUMA
+
+ /*
+ * Allocate node_to_cpumask_map based on number of available nodes
+ * Requires node_possible_map to be valid.
+ *
+ * Note: node_to_cpumask() is not valid until after this is done.
+ */
+ static void __init setup_node_to_cpumask_map(void)
+ {
+ unsigned int node, num = 0;
+ cpumask_t *map;
+
+ /* setup nr_node_ids if not done yet */
+ if (nr_node_ids == MAX_NUMNODES) {
+ for_each_node_mask(node, node_possible_map)
+ num = node;
+ nr_node_ids = num + 1;
+ }
+
+ /* allocate the map */
+ map = alloc_bootmem_low(nr_node_ids * sizeof(cpumask_t));
+
+ Dprintk(KERN_DEBUG "Node to cpumask map at %p for %d nodes\n",
+ map, nr_node_ids);
+
+ /* node_to_cpumask() will now work */
+ node_to_cpumask_map = map;
+ }
+
+ void __cpuinit numa_set_node(int cpu, int node)
+ {
+ int *cpu_to_node_map = early_per_cpu_ptr(x86_cpu_to_node_map);
+
+ if (cpu_pda(cpu) && node != NUMA_NO_NODE)
+ cpu_pda(cpu)->nodenumber = node;
+
+ if (cpu_to_node_map)
+ cpu_to_node_map[cpu] = node;
+
+ else if (per_cpu_offset(cpu))
+ per_cpu(x86_cpu_to_node_map, cpu) = node;
+
+ else
+ Dprintk(KERN_INFO "Setting node for non-present cpu %d\n", cpu);
+ }
+
+ void __cpuinit numa_clear_node(int cpu)
+ {
+ numa_set_node(cpu, NUMA_NO_NODE);
+ }
+
+ #ifndef CONFIG_DEBUG_PER_CPU_MAPS
+
+ void __cpuinit numa_add_cpu(int cpu)
+ {
+ cpu_set(cpu, node_to_cpumask_map[early_cpu_to_node(cpu)]);
+ }
+
+ void __cpuinit numa_remove_cpu(int cpu)
+ {
+ cpu_clear(cpu, node_to_cpumask_map[cpu_to_node(cpu)]);
+ }
+
+ #else /* CONFIG_DEBUG_PER_CPU_MAPS */
+
+ /*
+ * --------- debug versions of the numa functions ---------
+ */
+ static void __cpuinit numa_set_cpumask(int cpu, int enable)
+ {
+ int node = cpu_to_node(cpu);
+ cpumask_t *mask;
+ char buf[64];
+
+ if (node_to_cpumask_map == NULL) {
+ printk(KERN_ERR "node_to_cpumask_map NULL\n");
+ dump_stack();
+ return;
+ }
+
+ mask = &node_to_cpumask_map[node];
+ if (enable)
+ cpu_set(cpu, *mask);
+ else
+ cpu_clear(cpu, *mask);
+
+ cpulist_scnprintf(buf, sizeof(buf), *mask);
+ printk(KERN_DEBUG "%s cpu %d node %d: mask now %s\n",
+ enable? "numa_add_cpu":"numa_remove_cpu", cpu, node, buf);
+ }
+
+ void __cpuinit numa_add_cpu(int cpu)
+ {
+ numa_set_cpumask(cpu, 1);
+ }
+
+ void __cpuinit numa_remove_cpu(int cpu)
+ {
+ numa_set_cpumask(cpu, 0);
+ }
+
+ int cpu_to_node(int cpu)
+ {
+ if (early_per_cpu_ptr(x86_cpu_to_node_map)) {
+ printk(KERN_WARNING
+ "cpu_to_node(%d): usage too early!\n", cpu);
+ dump_stack();
+ return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu];
+ }
+ return per_cpu(x86_cpu_to_node_map, cpu);
+ }
+ EXPORT_SYMBOL(cpu_to_node);
+
+ /*
+ * Same function as cpu_to_node() but used if called before the
+ * per_cpu areas are setup.
+ */
+ int early_cpu_to_node(int cpu)
+ {
+ if (early_per_cpu_ptr(x86_cpu_to_node_map))
+ return early_per_cpu_ptr(x86_cpu_to_node_map)[cpu];
+
+ if (!per_cpu_offset(cpu)) {
+ printk(KERN_WARNING
+ "early_cpu_to_node(%d): no per_cpu area!\n", cpu);
+ dump_stack();
+ return NUMA_NO_NODE;
+ }
+ return per_cpu(x86_cpu_to_node_map, cpu);
+ }
+
+ /*
+ * Returns a pointer to the bitmask of CPUs on Node 'node'.
+ */
+ cpumask_t *_node_to_cpumask_ptr(int node)
+ {
+ if (node_to_cpumask_map == NULL) {
+ printk(KERN_WARNING
+ "_node_to_cpumask_ptr(%d): no node_to_cpumask_map!\n",
+ node);
+ dump_stack();
+ return &cpu_online_map;
+ }
+ BUG_ON(node >= nr_node_ids);
+ return &node_to_cpumask_map[node];
+ }
+ EXPORT_SYMBOL(_node_to_cpumask_ptr);
+
+ /*
+ * Returns a bitmask of CPUs on Node 'node'.
+ */
+ cpumask_t node_to_cpumask(int node)
+ {
+ if (node_to_cpumask_map == NULL) {
+ printk(KERN_WARNING
+ "node_to_cpumask(%d): no node_to_cpumask_map!\n", node);
+ dump_stack();
+ return cpu_online_map;
+ }
+ BUG_ON(node >= nr_node_ids);
+ return node_to_cpumask_map[node];
+ }
+ EXPORT_SYMBOL(node_to_cpumask);
+
+ /*
+ * --------- end of debug versions of the numa functions ---------
+ */
+
+ #endif /* CONFIG_DEBUG_PER_CPU_MAPS */
+
+ #endif /* X86_64_NUMA */
diff --cc arch/x86/kernel/setup_32.c
index 7e06ecd83174,ccd5f5cdbbe6..a9b19ad24edb
--- a/arch/x86/kernel/setup_32.c
+++ b/arch/x86/kernel/setup_32.c
@@@ -659,19 -731,11 +659,7 @@@ static void set_mca_bus(int x
static void set_mca_bus(int x) { }
#endif
- #ifdef CONFIG_NUMA
- /*
- * In the golden day, when everything among i386 and x86_64 will be
- * integrated, this will not live here
- */
- void *x86_cpu_to_node_map_early_ptr;
- int x86_cpu_to_node_map_init[NR_CPUS] = {
- [0 ... NR_CPUS-1] = NUMA_NO_NODE
- };
- DEFINE_PER_CPU(int, x86_cpu_to_node_map) = NUMA_NO_NODE;
- #endif
-
-/* Overridden in paravirt.c if CONFIG_PARAVIRT */
-char * __init __attribute__((weak)) memory_setup(void)
-{
- return machine_specific_memory_setup();
-}
+static void probe_roms(void);
/*
* Determine if we were loaded by an EFI loader. If so, then we have also been
@@@ -860,24 -869,12 +848,12 @@@ void __init setup_arch(char **cmdline_p
relocate_initrd();
#endif
- paravirt_post_allocator_init();
-
- dmi_scan_machine();
+ remapped_pgdat_init();
+ sparse_init();
+ zone_sizes_init();
- io_delay_init();
+ paravirt_post_allocator_init();
- #ifdef CONFIG_X86_SMP
- /*
- * setup to use the early static init tables during kernel startup
- * X86_SMP will exclude sub-arches that don't deal well with it.
- */
- x86_cpu_to_apicid_early_ptr = (void *)x86_cpu_to_apicid_init;
- x86_bios_cpu_apicid_early_ptr = (void *)x86_bios_cpu_apicid_init;
- #ifdef CONFIG_NUMA
- x86_cpu_to_node_map_early_ptr = (void *)x86_cpu_to_node_map_init;
- #endif
- #endif
-
#ifdef CONFIG_X86_GENERICARCH
generic_apic_probe();
#endif
commit 3de352bbd86f890dd0c5e1c09a6a1b0b29e0f8ce
Merge: 1b8ba39a3fad 9340e1ccdf7b
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Jul 8 11:14:58 2008 +0200
Merge branch 'x86/mpparse' into x86/devel
Conflicts:
arch/x86/Kconfig
arch/x86/kernel/io_apic_32.c
arch/x86/kernel/setup_64.c
arch/x86/mm/init_32.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --cc arch/x86/Kconfig
index 7dc46ba26fbf,23c352e408af..640dc62a7fa0
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@@ -261,39 -282,9 +282,9 @@@ config X86_VOYAGE
If you do not specifically know you have a Voyager based machine,
say N here, otherwise the kernel you build will not be bootable.
- config X86_NUMAQ
- bool "NUMAQ (IBM/Sequent)"
- depends on SMP && X86_32 && PCI
- select NUMA
- help
- This option is used for getting Linux to run on a (IBM/Sequent) NUMA
- multiquad box. This changes the way that processors are bootstrapped,
- and uses Clustered Logical APIC addressing mode instead of Flat Logical.
- You will need a new lynxer.elf file to flash your firmware with - send
- email to <Martin.Bligh@us.ibm.com>.
-
- config X86_SUMMIT
- bool "Summit/EXA (IBM x440)"
- depends on X86_32 && SMP
- help
- This option is needed for IBM systems that use the Summit/EXA chipset.
- In particular, it is needed for the x440.
-
- If you don't have one of these computers, you should say N here.
- If you want to build a NUMA kernel, you must select ACPI.
-
- config X86_BIGSMP
- bool "Support for other sub-arch SMP systems with more than 8 CPUs"
- depends on X86_32 && SMP
- help
- This option is needed for the systems that have more than 8 CPUs
- and if the system is not of any sub-arch type above.
-
- If you don't have such a system, you should say N here.
-
config X86_VISWS
bool "SGI 320/540 (Visual Workstation)"
- depends on X86_32
+ depends on X86_32 && !PCI
help
The SGI Visual Workstation series is an IA32-based workstation
based on SGI systems chips with some legacy PC hardware attached.
@@@ -304,12 -295,33 +295,33 @@@
and vice versa. See <file:Documentation/sgi-visws.txt> for details.
config X86_GENERICARCH
- bool "Generic architecture (Summit, bigsmp, ES7000, default)"
+ bool "Generic architecture"
depends on X86_32
help
- This option compiles in the Summit, bigsmp, ES7000, default subarchitectures.
- It is intended for a generic binary kernel.
- If you want a NUMA kernel, select ACPI. We need SRAT for NUMA.
+ This option compiles in the NUMAQ, Summit, bigsmp, ES7000, default
+ subarchitectures. It is intended for a generic binary kernel.
+ if you select them all, kernel will probe it one by one. and will
+ fallback to default.
+
+ if X86_GENERICARCH
+
+ config X86_NUMAQ
+ bool "NUMAQ (IBM/Sequent)"
- depends on SMP && X86_32 && X86_MPPARSE
++ depends on SMP && X86_32 && PCI && X86_MPPARSE
+ select NUMA
+ help
+ This option is used for getting Linux to run on a NUMAQ (IBM/Sequent)
+ NUMA multiquad box. This changes the way that processors are
+ bootstrapped, and uses Clustered Logical APIC addressing mode instead
+ of Flat Logical. You will need a new lynxer.elf file to flash your
+ firmware with - send email to <Martin.Bligh@us.ibm.com>.
+
+ config X86_SUMMIT
+ bool "Summit/EXA (IBM x440)"
+ depends on X86_32 && SMP
+ help
+ This option is needed for IBM systems that use the Summit/EXA chipset.
+ In particular, it is needed for the x440.
config X86_ES7000
bool "Support for Unisys ES7000 IA32 series"
@@@ -423,16 -442,32 +442,16 @@@ config MEMTES
default y
help
This option adds a kernel parameter 'memtest', which allows memtest
- to be disabled at boot. If this option is selected, memtest
- functionality can be disabled with memtest=0 on the kernel
- command line. The purpose of this option is to allow a single
- kernel image to be distributed with memtest built in, but not
- necessarily enabled.
-
+ to be set.
+ memtest=0, mean disabled; -- default
+ memtest=1, mean do 1 test pattern;
+ ...
+ memtest=4, mean do 4 test patterns.
If you are unsure how to answer this question, answer Y.
-config MEMTEST_BOOTPARAM_VALUE
- int "Memtest boot parameter default value (0-4)"
- depends on MEMTEST_BOOTPARAM
- range 0 4
- default 0
- help
- This option sets the default value for the kernel parameter
- 'memtest', which allows memtest to be disabled at boot. If this
- option is set to 0 (zero), the memtest kernel parameter will
- default to 0, disabling memtest at bootup. If this option is
- set to 4, the memtest kernel parameter will default to 4,
- enabling memtest at bootup, and use that as pattern number.
-
- If you are unsure how to answer this question, answer 0.
-
config ACPI_SRAT
def_bool y
- depends on X86_32 && ACPI && NUMA && (X86_SUMMIT || X86_GENERICARCH)
+ depends on X86_32 && ACPI && NUMA && X86_GENERICARCH
select ACPI_NUMA
config HAVE_ARCH_PARSE_SRAT
diff --cc arch/x86/kernel/Makefile
index 53557cbe4bfa,bcc2b123dabf..d1d4ee895270
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@@ -22,9 -22,10 +22,9 @@@ obj-y += setup_$(BITS).o i8259.o irqi
obj-$(CONFIG_X86_32) += sys_i386_32.o i386_ksyms_32.o
obj-$(CONFIG_X86_64) += sys_x86_64.o x8664_ksyms_64.o
obj-$(CONFIG_X86_64) += syscall_64.o vsyscall_64.o setup64.o
- obj-y += bootflag.o e820_$(BITS).o
+ obj-y += bootflag.o e820.o
obj-y += pci-dma.o quirks.o i8237.o topology.o kdebugfs.o
obj-y += alternative.o i8253.o pci-nommu.o
-obj-$(CONFIG_X86_64) += bugs_64.o
obj-y += tsc_$(BITS).o io_delay.o rtc.o
obj-$(CONFIG_X86_TRAMPOLINE) += trampoline.o
diff --cc arch/x86/kernel/aperture_64.c
index e819362c7068,66b140932b23..600470d464fa
--- a/arch/x86/kernel/aperture_64.c
+++ b/arch/x86/kernel/aperture_64.c
@@@ -326,33 -290,22 +326,33 @@@ void __init early_gart_iommu_check(void
if (gart_fix_e820 && !fix && aper_enabled) {
if (e820_any_mapped(aper_base, aper_base + aper_size,
E820_RAM)) {
- /* reserved it, so we can resuse it in second kernel */
+ /* reserve it, so we can reuse it in second kernel */
printk(KERN_INFO "update e820 for GART\n");
- add_memory_region(aper_base, aper_size, E820_RESERVED);
+ e820_add_region(aper_base, aper_size, E820_RESERVED);
update_e820();
}
- return;
}
+ if (!fix)
+ return;
+
/* different nodes have different setting, disable them all at first*/
- for (num = 24; num < 32; num++) {
- if (!early_is_k8_nb(read_pci_config(0, num, 3, 0x00)))
- continue;
+ for (i = 0; i < ARRAY_SIZE(bus_dev_ranges); i++) {
+ int bus;
+ int dev_base, dev_limit;
+
+ bus = bus_dev_ranges[i].bus;
+ dev_base = bus_dev_ranges[i].dev_base;
+ dev_limit = bus_dev_ranges[i].dev_limit;
+
+ for (slot = dev_base; slot < dev_limit; slot++) {
+ if (!early_is_k8_nb(read_pci_config(bus, slot, 3, 0x00)))
+ continue;
- ctl = read_pci_config(0, num, 3, 0x90);
- ctl &= ~1;
- write_pci_config(0, num, 3, 0x90, ctl);
+ ctl = read_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL);
+ ctl &= ~AMD64_GARTEN;
+ write_pci_config(bus, slot, 3, AMD64_GARTAPERTURECTL, ctl);
+ }
}
}
diff --cc arch/x86/kernel/io_apic_32.c
index dac47d61d2be,0662817d61bf..fedb3b113ace
--- a/arch/x86/kernel/io_apic_32.c
+++ b/arch/x86/kernel/io_apic_32.c
@@@ -844,8 -849,8 +850,8 @@@ static int __init find_isa_irq_apic(in
}
if (i < mp_irq_entries) {
int apic;
- for(apic = 0; apic < nr_ioapics; apic++) {
+ for (apic = 0; apic < nr_ioapics; apic++) {
- if (mp_ioapics[apic].mpc_apicid == mp_irqs[i].mpc_dstapic)
+ if (mp_ioapics[apic].mp_apicid == mp_irqs[i].mp_dstapic)
return apic;
}
}
@@@ -878,10 -883,10 +884,10 @@@ int IO_APIC_get_PCI_irq_vector(int bus
break;
if (!test_bit(lbus, mp_bus_not_pci) &&
- !mp_irqs[i].mpc_irqtype &&
+ !mp_irqs[i].mp_irqtype &&
(bus == lbus) &&
- (slot == ((mp_irqs[i].mpc_srcbusirq >> 2) & 0x1f))) {
- int irq = pin_2_irq(i, apic, mp_irqs[i].mpc_dstirq);
+ (slot == ((mp_irqs[i].mp_srcbusirq >> 2) & 0x1f))) {
- int irq = pin_2_irq(i,apic,mp_irqs[i].mp_dstirq);
++ int irq = pin_2_irq(i, apic, mp_irqs[i].mp_dstirq);
if (!(apic || IO_APIC_IRQ(irq)))
continue;
@@@ -976,36 -981,37 +982,36 @@@ static int MPBIOS_polarity(int idx
/*
* Determine IRQ line polarity (high active or low active):
*/
- switch (mp_irqs[idx].mpc_irqflag & 3) {
- switch (mp_irqs[idx].mp_irqflag & 3)
++ switch (mp_irqs[idx].mp_irqflag & 3) {
+ case 0: /* conforms, ie. bus-type dependent polarity */
{
- case 0: /* conforms, ie. bus-type dependent polarity */
- {
- polarity = test_bit(bus, mp_bus_not_pci)?
- default_ISA_polarity(idx):
- default_PCI_polarity(idx);
- break;
- }
- case 1: /* high active */
- {
- polarity = 0;
- break;
- }
- case 2: /* reserved */
- {
- printk(KERN_WARNING "broken BIOS!!\n");
- polarity = 1;
- break;
- }
- case 3: /* low active */
- {
- polarity = 1;
- break;
- }
- default: /* invalid */
- {
- printk(KERN_WARNING "broken BIOS!!\n");
- polarity = 1;
- break;
- }
+ polarity = test_bit(bus, mp_bus_not_pci)?
+ default_ISA_polarity(idx):
+ default_PCI_polarity(idx);
+ break;
+ }
+ case 1: /* high active */
+ {
+ polarity = 0;
+ break;
+ }
+ case 2: /* reserved */
+ {
+ printk(KERN_WARNING "broken BIOS!!\n");
+ polarity = 1;
+ break;
+ }
+ case 3: /* low active */
+ {
+ polarity = 1;
+ break;
+ }
+ default: /* invalid */
+ {
+ printk(KERN_WARNING "broken BIOS!!\n");
+ polarity = 1;
+ break;
+ }
}
return polarity;
}
@@@ -1018,38 -1024,66 +1024,38 @@@ static int MPBIOS_trigger(int idx
/*
* Determine IRQ trigger mode (edge or level sensitive):
*/
- switch ((mp_irqs[idx].mpc_irqflag>>2) & 3) {
- switch ((mp_irqs[idx].mp_irqflag>>2) & 3)
++ switch ((mp_irqs[idx].mp_irqflag>>2) & 3) {
+ case 0: /* conforms, ie. bus-type dependent */
{
- case 0: /* conforms, ie. bus-type dependent */
- {
- trigger = test_bit(bus, mp_bus_not_pci)?
- default_ISA_trigger(idx):
- default_PCI_trigger(idx);
+ trigger = test_bit(bus, mp_bus_not_pci)?
+ default_ISA_trigger(idx):
+ default_PCI_trigger(idx);
#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
- switch (mp_bus_id_to_type[bus])
- {
- case MP_BUS_ISA: /* ISA pin */
- {
- /* set before the switch */
- break;
- }
- case MP_BUS_EISA: /* EISA pin */
- {
- trigger = default_EISA_trigger(idx);
- break;
- }
- case MP_BUS_PCI: /* PCI pin */
- {
- /* set before the switch */
- break;
- }
- case MP_BUS_MCA: /* MCA pin */
- {
- trigger = default_MCA_trigger(idx);
- break;
- }
- default:
- {
- printk(KERN_WARNING "broken BIOS!!\n");
- trigger = 1;
- break;
- }
- }
-#endif
+ switch (mp_bus_id_to_type[bus]) {
+ case MP_BUS_ISA: /* ISA pin */
+ {
+ /* set before the switch */
break;
}
- case 1: /* edge */
+ case MP_BUS_EISA: /* EISA pin */
{
- trigger = 0;
+ trigger = default_EISA_trigger(idx);
break;
}
- case 2: /* reserved */
+ case MP_BUS_PCI: /* PCI pin */
{
- printk(KERN_WARNING "broken BIOS!!\n");
- trigger = 1;
+ /* set before the switch */
break;
}
- case 3: /* level */
+ case MP_BUS_MCA: /* MCA pin */
{
- trigger = 1;
+ trigger = default_MCA_trigger(idx);
break;
}
- default: /* invalid */
+ default:
{
printk(KERN_WARNING "broken BIOS!!\n");
- trigger = 0;
+ trigger = 1;
break;
}
}
@@@ -1345,10 -1360,10 +1351,10 @@@ void __init print_IO_APIC(void
if (apic_verbosity == APIC_QUIET)
return;
- printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries);
+ printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries);
for (i = 0; i < nr_ioapics; i++)
printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n",
- mp_ioapics[i].mpc_apicid, nr_ioapic_registers[i]);
+ mp_ioapics[i].mp_apicid, nr_ioapic_registers[i]);
/*
* We are a bit conservative about what we expect. We have to
@@@ -1740,15 -1758,15 +1750,15 @@@ static void __init setup_ioapic_ids_fro
spin_lock_irqsave(&ioapic_lock, flags);
reg_00.raw = io_apic_read(apic, 0);
spin_unlock_irqrestore(&ioapic_lock, flags);
-
+
- old_id = mp_ioapics[apic].mpc_apicid;
+ old_id = mp_ioapics[apic].mp_apicid;
- if (mp_ioapics[apic].mpc_apicid >= get_physical_broadcast()) {
+ if (mp_ioapics[apic].mp_apicid >= get_physical_broadcast()) {
printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n",
- apic, mp_ioapics[apic].mpc_apicid);
+ apic, mp_ioapics[apic].mp_apicid);
printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
reg_00.bits.ID);
- mp_ioapics[apic].mpc_apicid = reg_00.bits.ID;
+ mp_ioapics[apic].mp_apicid = reg_00.bits.ID;
}
/*
@@@ -1792,12 -1810,12 +1802,12 @@@
/*
* Read the right value from the MPC table and
* write it into the ID register.
- */
+ */
apic_printk(APIC_VERBOSE, KERN_INFO
"...changing IO-APIC physical APIC ID to %d ...",
- mp_ioapics[apic].mpc_apicid);
+ mp_ioapics[apic].mp_apicid);
- reg_00.bits.ID = mp_ioapics[apic].mpc_apicid;
+ reg_00.bits.ID = mp_ioapics[apic].mp_apicid;
spin_lock_irqsave(&ioapic_lock, flags);
io_apic_write(apic, 0, reg_00.raw);
spin_unlock_irqrestore(&ioapic_lock, flags);
diff --cc arch/x86/kernel/setup_64.c
index 545440e471b2,3220c7b56eb3..9a87113ba996
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@@ -267,34 -266,18 +268,6 @@@ static inline void __init reserve_crash
{}
#endif
- /* Overridden in paravirt.c if CONFIG_PARAVIRT */
- void __attribute__((weak)) __init memory_setup(void)
-#ifdef CONFIG_PCI_MMCONFIG
-extern void __cpuinit fam10h_check_enable_mmcfg(void);
-extern void __init check_enable_amd_mmconf_dmi(void);
-#else
-void __cpuinit fam10h_check_enable_mmcfg(void)
--{
- machine_specific_memory_setup();
--}
-
- static void __init parse_setup_data(void)
-void __init check_enable_amd_mmconf_dmi(void)
--{
- struct setup_data *data;
- unsigned long pa_data;
-
- if (boot_params.hdr.version < 0x0209)
- return;
- pa_data = boot_params.hdr.setup_data;
- while (pa_data) {
- data = early_ioremap(pa_data, PAGE_SIZE);
- switch (data->type) {
- default:
- break;
- }
- #ifndef CONFIG_DEBUG_BOOT_PARAMS
- free_early(pa_data, pa_data+sizeof(*data)+data->len);
- #endif
- pa_data = data->next;
- early_iounmap(data, PAGE_SIZE);
- }
--}
-#endif
--
/*
* setup_arch - architecture-specific boot-time initializations
*
diff --cc arch/x86/mm/discontig_32.c
index 8b4eac0ca07d,6216e43b6e95..a2f73ba42b8b
--- a/arch/x86/mm/discontig_32.c
+++ b/arch/x86/mm/discontig_32.c
@@@ -156,21 -156,32 +156,29 @@@ static void __init propagate_e820_map_n
*/
static void __init allocate_pgdat(int nid)
{
- if (nid && node_has_online_mem(nid))
+ if (nid && node_has_online_mem(nid) && node_remap_start_vaddr[nid])
NODE_DATA(nid) = (pg_data_t *)node_remap_start_vaddr[nid];
else {
- NODE_DATA(nid) = (pg_data_t *)(pfn_to_kaddr(min_low_pfn));
- min_low_pfn += PFN_UP(sizeof(pg_data_t));
+ unsigned long pgdat_phys;
+ pgdat_phys = find_e820_area(min_low_pfn<<PAGE_SHIFT,
+ (nid ? max_low_pfn:max_pfn_mapped)<<PAGE_SHIFT,
+ sizeof(pg_data_t),
+ PAGE_SIZE);
+ NODE_DATA(nid) = (pg_data_t *)(pfn_to_kaddr(pgdat_phys>>PAGE_SHIFT));
+ reserve_early(pgdat_phys, pgdat_phys + sizeof(pg_data_t),
+ "NODE_DATA");
}
+ printk(KERN_DEBUG "allocate_pgdat: node %d NODE_DATA %08lx\n",
+ nid, (unsigned long)NODE_DATA(nid));
}
-#ifdef CONFIG_DISCONTIGMEM
/*
- * In the discontig memory model, a portion of the kernel virtual area (KVA)
- * is reserved and portions of nodes are mapped using it. This is to allow
- * node-local memory to be allocated for structures that would normally require
- * ZONE_NORMAL. The memory is allocated with alloc_remap() and callers
- * should be prepared to allocate from the bootmem allocator instead. This KVA
- * mechanism is incompatible with SPARSEMEM as it makes assumptions about the
- * layout of memory that are broken if alloc_remap() succeeds for some of the
- * map and fails for others
+ * In the DISCONTIGMEM and SPARSEMEM memory model, a portion of the kernel
+ * virtual address space (KVA) is reserved and portions of nodes are mapped
+ * using it. This is to allow node-local memory to be allocated for
+ * structures that would normally require ZONE_NORMAL. The memory is
+ * allocated with alloc_remap() and callers should be prepared to allocate
+ * from the bootmem allocator instead.
*/
static unsigned long node_remap_start_pfn[MAX_NUMNODES];
static void *node_remap_end_vaddr[MAX_NUMNODES];
@@@ -284,9 -309,27 +306,8 @@@ static void init_remap_allocator(int ni
printk ("node %d will remap to vaddr %08lx - %08lx\n", nid,
(ulong) node_remap_start_vaddr[nid],
- (ulong) pfn_to_kaddr(highstart_pfn
- + node_remap_offset[nid] + node_remap_size[nid]));
+ (ulong) node_remap_end_vaddr[nid]);
}
-#else
-void *alloc_remap(int nid, unsigned long size)
-{
- return NULL;
-}
-
-static unsigned long calculate_numa_remap_pages(void)
-{
- return 0;
-}
-
-static void init_remap_allocator(int nid)
-{
-}
-
-void __init remap_numa_kva(void)
-{
-}
-#endif /* CONFIG_DISCONTIGMEM */
extern void setup_bootmem_allocator(void);
unsigned long __init setup_memory(void)
diff --cc arch/x86/mm/init_32.c
index d71be0eb0130,fb5694d788bf..65d55056b6e7
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@@ -221,17 -218,8 +221,10 @@@ static void __init kernel_physical_mapp
max_pfn_mapped = pfn;
}
}
+ update_page_count(PG_LEVEL_2M, pages_2m);
+ update_page_count(PG_LEVEL_4K, pages_4k);
}
- static inline int page_kills_ppro(unsigned long pagenr)
- {
- if (pagenr >= 0x70000 && pagenr <= 0x7003F)
- return 1;
- return 0;
- }
-
/*
* devmem_is_allowed() checks to see if /dev/mem access to a certain address
* is valid. The argument is a physical page number.
@@@ -573,9 -592,18 +597,7 @@@ void __init mem_init(void
#ifdef CONFIG_FLATMEM
BUG_ON(!mem_map);
-#endif
-#ifdef CONFIG_HIGHMEM
- /* check that fixmap and pkmap do not overlap */
- if (PKMAP_BASE + LAST_PKMAP*PAGE_SIZE >= FIXADDR_START) {
- printk(KERN_ERR
- "fixmap and kmap areas overlap - this will crash\n");
- printk(KERN_ERR "pkstart: %lxh pkend: %lxh fixstart %lxh\n",
- PKMAP_BASE, PKMAP_BASE + LAST_PKMAP*PAGE_SIZE,
- FIXADDR_START);
- BUG();
- }
#endif
- bad_ppro = ppro_with_ram_bug();
-
/* this will put all low memory onto the freelists */
totalram_pages += free_all_bootmem();
diff --cc arch/x86/xen/enlighten.c
index bd74229081c3,275163f81464..fe60aa9fed0a
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@@ -1309,12 -1233,9 +1310,12 @@@ asmlinkage void __init xen_start_kernel
? __pa(xen_start_info->mod_start) : 0;
boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
- if (!is_initial_xendomain())
+ if (!is_initial_xendomain()) {
+ add_preferred_console("xenboot", 0, NULL);
+ add_preferred_console("tty", 0, NULL);
add_preferred_console("hvc", 0, NULL);
+ }
/* Start the world */
- start_kernel();
+ i386_start_kernel();
}
diff --cc arch/x86/xen/setup.c
index 488447878a9d,9001c9df04d8..a29575803204
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@@ -37,11 -38,9 +37,11 @@@ char * __init xen_memory_setup(void
{
unsigned long max_pfn = xen_start_info->nr_pages;
+ max_pfn = min(MAX_DOMAIN_PAGES, max_pfn);
+
e820.nr_map = 0;
- add_memory_region(0, LOWMEMSIZE(), E820_RAM);
- add_memory_region(HIGH_MEMORY, PFN_PHYS(max_pfn)-HIGH_MEMORY, E820_RAM);
+ e820_add_region(0, LOWMEMSIZE(), E820_RAM);
+ e820_add_region(HIGH_MEMORY, PFN_PHYS(max_pfn)-HIGH_MEMORY, E820_RAM);
return "Xen";
}
commit c73d8dd8595c4c6c1c016bb1ac4dd8035e67975b
Author: Ingo Molnar <mingo@elte.hu>
Date: Tue Jul 8 10:47:39 2008 +0200
Revert parts of "x86: update mptable"
Signed-off-by: Ingo Molnar <mingo@elte.hu>
diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
index e556f30c7c16..89022a74faee 100644
--- a/drivers/acpi/pci_irq.c
+++ b/drivers/acpi/pci_irq.c
@@ -570,11 +570,6 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
(triggering == ACPI_LEVEL_SENSITIVE) ? "level" : "edge",
(polarity == ACPI_ACTIVE_LOW) ? "low" : "high", dev->irq);
-#ifdef CONFIG_X86
- mp_config_acpi_gsi(dev->bus->number, dev->devfn, dev->pin, irq,
- triggering, polarity);
-#endif
-
return 0;
}